公开(公告)号：US11227894B2

公开(公告)日：2022-01-18

申请号：US16668092

申请日：2019-10-30

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anuj Gupta ,  Bipul C. Paul

IPC: H01L29/78 ,  H01L23/522 ,  H01L27/22 ,  H01L23/528 ,  H01L27/24

Abstract: One illustrative device includes an array of memory cells including a first row of memory cells and a second row of memory cells adjacent the first row, a first gate structure extending along the first row, a second gate structure extending along the second row, a first wordline positioned in a first layer above the array and contacting the first gate structure, and a second wordline positioned in a second layer above the first layer and contacting the second gate structure, wherein the second wordline vertically overlaps the first wordline.

公开(公告)号：US20210134881A1

公开(公告)日：2021-05-06

申请号：US16668092

申请日：2019-10-30

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anuj Gupta ,  Bipul C. Paul

IPC: H01L27/22 ,  H01L23/528 ,  H01L23/522

Abstract: One illustrative device includes an array of memory cells including a first row of memory cells and a second row of memory cells adjacent the first row, a first gate structure extending along the first row, a second gate structure extending along the second row, a first wordline positioned in a first layer above the array and contacting the first gate structure, and a second wordline positioned in a second layer above the first layer and contacting the second gate structure, wherein the second wordline vertically overlaps the first wordline.

公开(公告)号：US11075247B2

公开(公告)日：2021-07-27

申请号：US16691694

申请日：2019-11-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anuj Gupta ,  Bipul C. Paul ,  Joe A. Versaggi

IPC: H01L27/24 ,  H01L45/00 ,  G11C13/00

Abstract: The disclosure provides a circuit structure and method to provide self-aligned contacts in a zero-via conductor layer. The structure may include a device layer including a first contact to a first source/drain region, and a second contact to a second source/drain region, the first and second source/drain regions being separated by a transistor gate. A zero-via layer of the circuit structure may include: a first via conductor positioned on the first contact and self-aligned with an overlying metal level in a first direction; and a second via conductor positioned on the second contact and self-aligned with the overlying metal level in a second direction, the second direction being orthogonal to the first direction.

公开(公告)号：US11004491B2

公开(公告)日：2021-05-11

申请号：US16582474

申请日：2019-09-25

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anuj Gupta ,  Bipul C. Paul ,  Joseph Versaggi

IPC: G11C5/06 ,  G11C11/16

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to twisted wordline structures and methods of manufacture. The memory array structure includes: a plurality of bitcells comprising memory elements and access transistors; a plurality of bitlines and wordlines which interconnect the bitcells; a plurality of dummy bitcells which intersect with the bitlines and wordlines; and a plurality of twisted wordline strap cells which twist wordlines in the dummy bitcells and connect a higher metal layer in the bitcells to a gate structure of the access transistor.

公开(公告)号：US20210159273A1

公开(公告)日：2021-05-27

申请号：US16691694

申请日：2019-11-22

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anuj Gupta ,  Bipul C. Paul ,  Joe A. Versaggi

IPC: H01L27/24 ,  H01L45/00 ,  G11C13/00

Abstract: The disclosure provides a circuit structure and method to provide self-aligned contacts in a zero-via conductor layer. The structure may include a device layer including a first contact to a first source/drain region, and a second contact to a second source/drain region, the first and second source/drain regions being separated by a transistor gate. A zero-via layer of the circuit structure may include: a first via conductor positioned on the first contact and self-aligned with an overlying metal level in a first direction; and a second via conductor positioned on the second contact and self-aligned with the overlying metal level in a second direction, the second direction being orthogonal to the first direction.