Capacitor structure for integrated circuit and related methods

    公开(公告)号:US11348867B2

    公开(公告)日:2022-05-31

    申请号:US17089775

    申请日:2020-11-05

    Abstract: Embodiments of the disclosure provide a capacitor for an integrated circuit (IC). The capacitor may include a first vertical electrode on an upper surface of a first conductor within a first wiring layer. A capacitor dielectric may be on an upper surface of the first vertical electrode. A second vertical electrode may be on an upper surface of the capacitor dielectric. The second vertical electrode is vertically between the capacitor dielectric and a second conductor. An inter-level dielectric (ILD) layer is adjacent to each of the first vertical electrode, the capacitor dielectric, and the second vertical electrode. The ILD layer is vertically between the first conductor and the second conductor.

    CAPACITOR STRUCTURE FOR INTEGRATED CIRCUIT AND RELATED METHODS

    公开(公告)号:US20220139819A1

    公开(公告)日:2022-05-05

    申请号:US17089775

    申请日:2020-11-05

    Abstract: Embodiments of the disclosure provide a capacitor for an integrated circuit (IC). The capacitor may include a first vertical electrode on an upper surface of a first conductor within a first wiring layer. A capacitor dielectric may be on an upper surface of the first vertical electrode. A second vertical electrode may be on an upper surface of the capacitor dielectric. The second vertical electrode is vertically between the capacitor dielectric and a second conductor. An inter-level dielectric (ILD) layer is adjacent to each of the first vertical electrode, the capacitor dielectric, and the second vertical electrode. The ILD layer is vertically between the first conductor and the second conductor.

    METAMATERIAL EDGE COUPLERS IN THE BACK-END-OF-LINE STACK OF A PHOTONICS CHIP

    公开(公告)号:US20230117802A1

    公开(公告)日:2023-04-20

    申请号:US18083716

    申请日:2022-12-19

    Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.

    OPTICAL COUPLERS INCLUDING A BACK-END-OF-LINE GRATING

    公开(公告)号:US20230083198A1

    公开(公告)日:2023-03-16

    申请号:US17475689

    申请日:2021-09-15

    Abstract: Structures including an optical coupler and methods of fabricating a structure including an optical coupler. The structure includes a substrate, a first dielectric layer on the substrate, and an optical coupler having a first grating and a second grating. The first grating has a first plurality of segments positioned in a first level over the first dielectric layer. The second grating has a second plurality of segments positioned in a second level over the first dielectric layer. The second level differs in elevation above the first dielectric layer from the first level. The second plurality of segments are positioned in the second level to overlap with the first plurality of segments of the first grating, and the second plurality of segments comprise a metal. A second dielectric layer is positioned in a vertical direction between the first level and the second level.

    Metamaterial edge couplers in the back-end-of-line stack of a photonics chip

    公开(公告)号:US11567261B2

    公开(公告)日:2023-01-31

    申请号:US17173639

    申请日:2021-02-11

    Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.

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