公开(公告)号：US06977946B1

公开(公告)日：2005-12-20

申请号：US09749089

申请日：2001-03-12

申请人： Gary Goldman ,  David Hughes ,  Madhav Marathe

发明人： Gary Goldman ,  David Hughes ,  Madhav Marathe

IPC分类号： H04J3/16 ,  H04L12/56

CPC分类号： H04L47/10 ,  H04L47/263 ,  H04L47/50 ,  H04L47/525 ,  H04L47/568 ,  H04L2012/5679

摘要： A method to utilize unscheduled bandwidth in a calendar-based VC scheduling scheme by caching a plurality of virtual connections for processing. A plurality of virtual connection addresses are stored in a cache memory. A virtual connection corresponding to one of these addresses is processed if one of the time periods for transmitting on the trunk is liable to be wasted because no cell is available through the normal calendaring algorithm. A VC cache is added to the VC scheduler in “parallel” with the calendar-based scheduler. When the calendar-based scheduler has a time period in which no VC is scheduled for transmission on the trunk, a VC address is obtained from the cache and that VC is processed. What makes this scheme work is the observation that the VCs that have been active will have more cells to transmit.

摘要翻译： 一种通过缓存多个虚拟连接进行处理来在基于日历的VC调度方案中利用未调度带宽的方法。 多个虚拟连接地址存储在高速缓冲存储器中。 如果通过正常的日历算法没有小区可用，则在中继线上发送的时间段之一容易被浪费，所以处理对应于这些地址之一的虚拟连接。 使用基于日历的调度程序将VC缓存添加到“并行”的VC调度程序中。 当基于日历的调度器具有时间周期，其中没有VC被调度用于在中继线上传输时，从高速缓存获得VC地址，并且处理该VC。 这个方案的工作原理是观察到已经活跃的VC将会有更多的传输单元。

公开(公告)号：US09021582B2

公开(公告)日：2015-04-28

申请号：US11739365

申请日：2007-04-24

申请人： Gary Goldman ,  Philip A. Thomas ,  Ramesh Panwar

发明人： Gary Goldman ,  Philip A. Thomas ,  Ramesh Panwar

IPC分类号： G06F11/00 ,  H04L29/06

CPC分类号： H04L63/0245 ,  H04L63/1416

摘要： This disclosure describes techniques of determining whether a symbol stream includes a pattern defined by a regular expression. As described herein, the regular expression may be represented using a non-deterministic finite automaton (NFA). A plurality of states in the NFA may be evaluated in parallel. These states may be associated with a plurality of symbol positions in a symbol stream. Evaluating a plurality of states and symbols in parallel may allow for faster determinations of whether the symbol stream includes the pattern defined by the regular expression.

摘要翻译： 本公开描述了确定符号流是否包括由正则表达式定义的模式的技术。 如本文所述，正则表达式可以使用非确定性有限自动机（NFA）来表示。 可以并行评估NFA中的多个状态。 这些状态可以与符号流中的多个符号位置相关联。 并行地评估多个状态和符号可以允许更快地确定符号流是否包括由正则表达式定义的模式。

公开(公告)号：US08457142B1

公开(公告)日：2013-06-04

申请号：US13030694

申请日：2011-02-18

申请人： Gary Goldman ,  Srihari Vegesna

发明人： Gary Goldman ,  Srihari Vegesna

IPC分类号： H04L12/28

CPC分类号： H04L47/629 ,  H04L47/266

摘要： A scheduler in a network element may include a dequeuer to dequeue packets from a set of scheduling nodes using a deficit weighted round robin process, where the dequeuer is to determine whether a subset of the set of scheduling nodes is being backpressured. The dequeuer may set a root rich most negative credits (MNC) value, associated with a root node, to a root poor MNC value, associated with the root node, and set the root poor MNC value to zero, when the subset is not being backpressured, and may set the rich MNC value to a maximum of the root poor MNC value and a root backpressured rich MNC value, associated with the subset, and set the root poor MNC value to a root backpressured poor MNC value, associated with the subset, when the subset is being backpressured.

公开(公告)号：US20080271141A1

公开(公告)日：2008-10-30

申请号：US11739365

申请日：2007-04-24

申请人： Gary Goldman ,  Philip A. Thomas ,  Ramesh Panwar

发明人： Gary Goldman ,  Philip A. Thomas ,  Ramesh Panwar

IPC分类号： G06F11/00

CPC分类号： H04L63/0245 ,  H04L63/1416

摘要： This disclosure describes techniques of determining whether a symbol stream includes a pattern defined by a regular expression. As described herein, the regular expression may be represented using a non-deterministic finite automaton (NFA). A plurality of states in the NFA may be evaluated in parallel. These states may be associated with a plurality of symbol positions in a symbol stream. Evaluating a plurality of states and symbols in parallel may allow for faster determinations of whether the symbol stream includes the pattern defined by the regular expression.

摘要翻译： 本公开描述了确定符号流是否包括由正则表达式定义的模式的技术。 如本文所述，正则表达式可以使用非确定性有限自动机（NFA）来表示。 可以并行评估NFA中的多个状态。 这些状态可以与符号流中的多个符号位置相关联。 并行地评估多个状态和符号可以允许更快地确定符号流是否包括由正则表达式定义的模式。

公开(公告)号：US07212494B1

公开(公告)日：2007-05-01

申请号：US09846157

申请日：2001-04-30

申请人： Gary Goldman ,  Nitin Garg ,  Man Yip ,  Phong Bui ,  Kent Wendorf

发明人： Gary Goldman ,  Nitin Garg ,  Man Yip ,  Phong Bui ,  Kent Wendorf

IPC分类号： H04L12/56

CPC分类号： H04L47/10 ,  H04L47/2416 ,  H04L47/2433 ,  H04L47/245 ,  H04L47/31

摘要： A method and system for the fair allocation of unused guaranteed bandwidth. Data segments of at least one class of service are received at each of a plurality of ingress line cards. Each class of service has a guaranteed percentage of transmission bandwidth. The system uses a must-serve bit to mark a number of data cells within each class of service. The number of cells marked depends on the guaranteed bandwidth percentage for the particular class of service. The mark is referred to as “must-serve” since the scheduler must serve the particular class of service to the extent of the marked cells in order to meet the guaranteed bandwidth. The generic switch fabric monitors the cells and the switch CPU reallocates bandwidth so that only the marked cells are provided preferential transmission. Non-marked cells compete equally for excess bandwidth.

摘要翻译： 公平分配未使用保证带宽的方法和系统。 在多个入口线卡中的每一个处接收至少一类服务的数据段。 每类服务具有传输带宽百分比的保证。 系统使用必须服务位来标记每个服务类别中的多个数据单元。 标记的单元数量取决于特定服务等级的保证带宽百分比。 该标记被称为“必须服务”，因为调度程序必须在标记的单元的范围内服务于特定的服务等级，以便满足保证的带宽。 通用交换结构监视单元，并且交换机CPU重新分配带宽，使得只有标记的单元被提供优先传输。 未标记的细胞竞争过多的带宽。

公开(公告)号：USD388941S

公开(公告)日：1998-01-13

申请号：US59912

申请日：1996-09-17

申请人： Ashley Schapiro ,  Gary Goldman

设计人： Ashley Schapiro ,  Gary Goldman

公开(公告)号：US08520522B1

公开(公告)日：2013-08-27

申请号：US12905696

申请日：2010-10-15

申请人： Gary Goldman ,  Paul Kim ,  Chang-Hong Wu

发明人： Gary Goldman ,  Paul Kim ,  Chang-Hong Wu

IPC分类号： H04L12/26

CPC分类号： H04L47/26 ,  H04L47/29 ,  H04L47/30

摘要： A network device operating in operating in a Priority Flow Control (PFC) mode receives a stream of packets for outputting on a particular port, assigns each packet in the stream of packets to one of multiple buffer queues associated with the port, and generates, based on the assigning, packet counts for the multiple buffer queues. The network device aggregates the packet counts for a group of particular buffer queues, of the multiple buffer queues, that are not subject to a PFC restriction, to create an unrestricted aggregated count. The network device determines whether the unrestricted aggregated count exceeds a flow-control threshold for the group of particular buffer queues and sends, to an upstream queue scheduler, a flow control signal when the unrestricted aggregated count exceeds a flow-control threshold.

摘要翻译： 以优先级流量控制（PFC）模式操作的网络设备接收用于在特定端口上输出的分组流，将分组流中的每个分组分配给与端口相关联的多个缓冲器队列之一，并基于 对多个缓冲区队列的分配计数。 网络设备聚合不受PFC限制的多个缓冲区队列的一组特定缓冲队列的分组计数，以创建无限制的聚合计数。 网络设备确定无限制聚合计数是否超过特定缓冲队列组的流量控制阈值，并且当无限制聚合计数超过流量控制阈值时，向上游队列调度器发送流控制信号。

公开(公告)号：US08392672B1

公开(公告)日：2013-03-05

申请号：US12911012

申请日：2010-10-25

申请人： Robert Rhoades ,  Paul Kim ,  Gary Goldman

发明人： Robert Rhoades ,  Paul Kim ,  Gary Goldman

IPC分类号： G06F12/00

CPC分类号： H04L49/901 ,  G06F12/00

摘要： A network device that includes a first memory to store packets in segments; a second memory to store pointers associated with the first memory; a third memory to store summary bits and allocation bits, where the allocation bits correspond to the segments. The network device also includes a processor to receive a request for memory resources; determine whether a pointer is stored in the second memory, where the pointer corresponds to a segment that is available to store a packet; and send the pointer when the pointer is stored in the second memory. The processor is further to perform a search to identify other pointers when the pointer is not stored in the second memory, where performing the search includes identifying a set of allocation bits, based on an unallocated summary bit, that corresponds to the other pointers; identify another pointer, of the other pointers, based on an unallocated allocation bit of the set of allocation bits; and send the other pointer in response to the request.

公开(公告)号：US5793233A

公开(公告)日：1998-08-11

申请号：US655475

申请日：1996-05-30

申请人： Ramachandra P. Kunda ,  Gary Goldman

发明人： Ramachandra P. Kunda ,  Gary Goldman

IPC分类号： H03L7/085 ,  H03L7/00

CPC分类号： H03L7/085

摘要： A phase detection signal is generated with a phase detection logic pipeline and its associated tapped pipeline signal combinational logic circuit. The phase detection logic pipeline generates phase detection logic pipeline output signals from a first input clock signal and a second input clock signal. The first input clock signal is applied to a first flip-flop of a set of serially connected flip-flops to generate a pipeline signal. The pipeline signal is driven through the set of serially connected flip-flops by the second clock input signal. Logic pipeline output nodes connected between the serially connected flip-flops carry the phase detection logic pipeline output signals. The phase detection logic pipeline output signals are applied to the tapped pipeline signal combinational logic circuit, which logically combines the signals to generate the phase detection signal.

摘要翻译： 相位检测信号用相位检测逻辑流水线及其相关联的抽头流水线信号组合逻辑电路产生。 相位检测逻辑流水线从第一输入时钟信号和第二输入时钟信号产生相位检测逻辑流水线输出信号。 第一输入时钟信号被施加到一组串联的触发器的第一触发器以产生流水线信号。 流水线信号通过第二时钟输入信号通过串联的触发器组驱动。 连接在串联的触发器之间的逻辑管线输出节点携带相位检测逻辑管线输出信号。 相位检测逻辑流水线输出信号被施加到抽头流水线信号组合逻辑电路，其逻辑组合信号以产生相位检测信号。