公开(公告)号：US20120233576A1

公开(公告)日：2012-09-13

申请号：US13043761

申请日：2011-03-09

申请人： Geoffrey R. Barrows ,  Derick G. Behrends ,  William J. Craig ,  Michael S. Gray ,  Matthew T. Guzowski ,  Kevin W. McCullen ,  Rani Narayan ,  Robert F. Walker

发明人： Geoffrey R. Barrows ,  Derick G. Behrends ,  William J. Craig ,  Michael S. Gray ,  Matthew T. Guzowski ,  Kevin W. McCullen ,  Rani Narayan ,  Robert F. Walker

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： Method, system, computer, etc., embodiments receive an original integrated circuit design into a computerized device. The methods herein automatically replace at least some of the original cells within the original integrated circuit design with replacement cells using the computerized device. Each of the replacement cells has an initial cell size that is unassociated with any specific design size. The methods herein automatically change the original design size of the integrated circuit design to a changed design size, and automatically individually change the initial cell size of each of the replacement cells to different sizes. At least two different replacement cells are changed from the initial cell size by different size reduction amounts based on different amounts of space required within the changed design size for each of the replacement cells.

摘要翻译： 方法，系统，计算机等实施例将原始集成电路设计接收到计算机化设备中。 本文中的方法使用计算机化设备自动地用原始集成电路设计中的至少一些原始单元替换替换单元。 每个替换单元格具有与任何特定设计尺寸无关的初始单元格大小。 这里的方法将集成电路设计的原始设计尺寸自动地改变为改变的设计尺寸，并且将每个替换单元的初始单元尺寸自动地单独地改变为不同的尺寸。 基于每个替换单元的改变的设计尺寸中所需的不同的空间量，将至少两个不同的替换单元从初始单元大小改变为不同的尺寸减小量。

公开(公告)号：US4670669A

公开(公告)日：1987-06-02

申请号：US640421

申请日：1984-08-13

申请人： Peter E. Cottrell ,  William J. Craig ,  Ronald R. Troutman

发明人： Peter E. Cottrell ,  William J. Craig ,  Ronald R. Troutman

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H03K3/354

CPC分类号： H01L27/0222

摘要： A charge pumping structure is disclosed for use in a substrate bias voltage generator. It includes a capacitor on a substrate region for coupling to a first node periodic voltage signals received at a second node. A first diode structure provides a current path from the first node to the substrate and a second diode structure provides a current path between the first node and a reference potential, which is typically the ground. The first diode structure includes a PN junction diode, an isolation ring for collecting minority charge carriers injected into the substrate and is constructed on a portion of the substrate that has a lower doping concentration than the underlying substrate portion establishing a built-in electric field which inhibits the flow of minority carriers from the first diode to the underlying substrate. The second diode structure may include a pocket type PN junction diode constructed so that majority carriers are prevented from moving back into the substrate from which the substrate bias voltage generator will have to remove them.

摘要翻译： 公开了用于衬底偏置电压发生器的电荷泵送结构。 它包括在衬底区域上的电容器，用于耦合到第一节点在第二节点处接收的周期性电压信号。 第一二极管结构提供从第一节点到衬底的电流路径，并且第二二极管结构提供第一节点和通常为地的参考电位之间的电流路径。 第一二极管结构包括PN结二极管，用于收集注入到衬底中的少数电荷载流子的隔离环，并且构建在衬底的一部分上，该衬底具有比下面的衬底部分更低的掺杂浓度，建立内置的电场， 抑制少数载流子从第一二极管流到下面的衬底。 第二二极管结构可以包括袖珍型PN结二极管，其被构造成使得多数载流子被阻止移回到衬底中，衬底偏置电压发生器将从该衬底移除它们。

公开(公告)号：US4626882A

公开(公告)日：1986-12-02

申请号：US632098

申请日：1984-07-18

申请人： Peter E. Cottrell ,  William J. Craig ,  Ronald R. Troutman

发明人： Peter E. Cottrell ,  William J. Craig ,  Ronald R. Troutman

IPC分类号： H01L27/08 ,  H01L21/761 ,  H01L27/02 ,  H01L27/092 ,  H01L29/78

CPC分类号： H01L27/0251 ,  H01L21/761 ,  H01L27/0925

摘要： Disclosed is an overvoltage protection structure which when used with CMOS circuits it protects them from overvoltage conditions while minimizing latch-up conditions in the structure. It consists of a well region of an opposite conductivity to that of the substrate defining a pocket region having a conductivity type which is similar to that of the substrate. A first PN junction diode is formed in a portion of the well region and a second PN junction diode is formed in the pocket region. The two diodes have opposite polarity and they both are connected to a signal line in such a way that one of the two diodes will be forward biased if the voltage on the signal line exceeds the bounds of the power supply voltages. The pocket region is connected to a V.sub.SS terminal which is normally grounded and the well region is connected to a power supply V.sub.DD. The doping concentration in the well region is predetermined to have a gradient so that minority carriers injected from one of the diodes in the well region will be repulsed and prevented from moving into the substrate region where they would be majority carriers and they could cause latch-up in the structure or at the very least adversely affect the voltage level of the substrate. Instead the injected carriers recombine in the well region or are collected by the adjacent isolated pocket region.When the second diode is forward biased, the minority carriers are injected into the isolated pocket region and are prevented from reaching the substrate by the underlying well region. This prevents these carriers from affecting the operation of adjacent circuits.

摘要翻译： 公开了一种过电压保护结构，当与CMOS电路一起使用时，其保护它们免于过压状况，同时最小化结构中的闩锁状态。 它由与衬底相反的导电性的阱区域组成，该阱区限定具有类似于衬底的导电类型的穴区。 第一PN结二极管形成在阱区的一部分中，并且第二PN结二极管形成在腔区中。 两个二极管具有相反的极性，并且它们都以这样的方式连接到信号线，使得如果信号线上的电压超过电源电压的范围，则两个二极管中的一个将被正向偏置。 口袋区域连接到通常接地的VSS端子，并且阱区域连接到电源VDD。 阱区中的掺杂浓度被预定为具有梯度，使得从阱区中的二极管中的一个注入的少数载流子将被排斥并被阻止移动到它们将成为多数载流子的衬底区域中，并且它们可能导致闭锁 - 或者至少不利地影响衬底的电压电平。 相反，注入的载体在阱区域中重新组合或由相邻的隔离袋区域收集。 当第二二极管被正向偏置时，少数载流子被注入到隔离的袋区域中并被下面的阱区域阻止到达衬底。 这防止这些载波影响相邻电路的操作。