摘要:
Method, system, computer, etc., embodiments receive an original integrated circuit design into a computerized device. The methods herein automatically replace at least some of the original cells within the original integrated circuit design with replacement cells using the computerized device. Each of the replacement cells has an initial cell size that is unassociated with any specific design size. The methods herein automatically change the original design size of the integrated circuit design to a changed design size, and automatically individually change the initial cell size of each of the replacement cells to different sizes. At least two different replacement cells are changed from the initial cell size by different size reduction amounts based on different amounts of space required within the changed design size for each of the replacement cells.
摘要:
Methods of independently migrating a hierarchical design are disclosed. A method for migrating a macro in an integrated circuit comprises: determining an interface strategy between a base cell in the macro and the macro, the base cell including an interface element involved in the interface strategy; migrating the base cell independently with respect to the macro based on the interface strategy; initially scaling the macro; swapping the migrated base cell into the macro; and legalizing content of the initially scaled macro.
摘要:
Methods of independently migrating a hierarchical design are disclosed. A method for migrating a macro in an integrated circuit comprises: determining an interface strategy between a base cell in the macro and the macro, the base cell including an interface element involved in the interface strategy; migrating the base cell independently with respect to the macro based on the interface strategy; initially scaling the macro; swapping the migrated base cell into the macro; and legalizing content of the initially scaled macro.
摘要:
A method, system and program product for context aware sub-circuit layout modification are disclosed. The method may include defining at least one context for the sub-circuit for each circuit that uses the sub-circuit; in the case that a plurality of contexts are defined, minimizing a number of contexts for the sub-circuit by combining contexts into at least one stage; placing each stage into a staged layout; and modifying the sub-circuit by modifying the staged layout.
摘要:
An adaptive weighting method for layout optimization differentiates different priorities by assigning the weight of a higher priority (pi) to be multiple of the weight of a lower priority (pi−1) where W(pi)=mi % W(pi−1. To avoid numerical imprecision, this method keeps the total cost in the objective function within a trustable range by scaling the initial weights in the objectives, while maintaining relativity, to produce the scaled weights.
摘要:
A method, system and program product for context aware sub-circuit layout modification are disclosed. The method may include defining at least one context for the sub-circuit for each circuit that uses the sub-circuit; in the case that a plurality of contexts are defined, minimizing a number of contexts for the sub-circuit by combining contexts into at least one stage; placing each stage into a staged layout; and modifying the sub-circuit by modifying the staged layout.
摘要:
An adaptive weighting method for layout optimization differentiates different priorities by assigning the weight of a higher priority (pi) to be multiple of the weight of a lower priority (pi−1) where W(pi)=mi % W(pi−1. To avoid numerical imprecision, this method keeps the total cost in the objective function within a trustable range by scaling the initial weights in the objectives, while maintaining relativity, to produce the scaled weights.
摘要:
Approaches are provided for fixing pin mismatches from swapping library cells in layout migration. Specifically, a method is provided that includes collecting information about a first technology pin from a library cell in a first technology. The method further includes swapping the library cell in the first technology with a library cell in a second technology. The method further includes collecting information about a second technology pin from the library cell in the second technology. The method further includes building a pin-mapping table that is configured to map the first technology pin to the second technology pin. The method further includes scaling a layout from the first technology to the second technology. The method further includes modifying the layout based on the pin-mapping table to match the at least one first technology pin to the at least one second technology pin while satisfying ground rules of the second technology.
摘要:
A method, apparatus, and computer program product for visually indicating the interaction between one or more edges of a design that contribute to a defined critical area pattern.
摘要:
A method, apparatus, and computer program product for visually indicating the interaction between one or more edges of a design that contribute to a defined critical area pattern.