摘要:
Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit (210) and a target filter circuit (265). The equalizer circuit performs equalization based at least in part on an equalizer coefficient (215). The methods further include generating an error (285) based upon a first output from the equalizer circuit and a second output from the target filter circuit. An inter-symbol interference component (295) is extracted from the error (285) and used to calculate an equalizer gradient (226). Based at least in part on the equalizer gradient (226), the equalizer coefficient (215) is calculated.
摘要:
Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit (210) and a target filter circuit (265). The equalizer circuit performs equalization based at least in part on an equalizer coefficient (215). The methods further include generating an error (285) based upon a first output from the equalizer circuit and a second output from the target filter circuit. An inter-symbol interference component (295) is extracted from the error (285) and used to calculate an equalizer gradient (226). Based at least in part on the equalizer gradient (226), the equalizer coefficient (215) is calculated.
摘要:
Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.
摘要:
Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.
摘要:
Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
摘要:
Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
摘要:
Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.
摘要:
Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.
摘要:
An error correction encoder inserts redundant parity information into a data stream to improve system reliability. The encoder can generate the redundant parity information using a composite code. Dummy bits are inserted into the data stream in locations reserved for parity information generated by subsequent encoding. The error correction code can have a uniform or a non-uniform span. The span corresponds to consecutive channel bits that are within a single block of a smaller parity code that is used to form a composite code. The span lengths can be variant across the whole codeword by inserting dummy bits in less than all of the spans.
摘要:
Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.