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公开(公告)号:US20060190659A1
公开(公告)日:2006-08-24
申请号:US11064568
申请日:2005-02-24
申请人: Giora Biran , Robert Drehmel , Robert Horton , Mark Kautzman , Jamie Kuesel , Ming-i Lin , Eric Mejdrich , Clarence Ogilvie , Charles Woodruff
发明人: Giora Biran , Robert Drehmel , Robert Horton , Mark Kautzman , Jamie Kuesel , Ming-i Lin , Eric Mejdrich , Clarence Ogilvie , Charles Woodruff
IPC分类号: G06F13/36
CPC分类号: G06F13/4059 , G06F12/0831
摘要: A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.
摘要翻译: 高速计算机总线与高速输出总线之间的总线桥。 优选实施例是用于来自国际商业机器公司(IBM)的GPUL PowerPC微处理器的GPUL总线与输出高速接口(MPI)之间的总线桥。 另一个优选实施例是多芯片模块上的总线收发器中的总线桥。
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公开(公告)号:US20060190668A1
公开(公告)日:2006-08-24
申请号:US11064745
申请日:2005-02-24
申请人: Giora Biran , Matthew Cushing , Robert Drehmel , Allen Gavin , Mark Kautzman , Jamie Kuesel , Ming-I Lin , David Luick , James Marcella , Mark Maxson , Eric Mejdrich , Adam Muff , Clarence Ogilvie , Charles Woodruff
发明人: Giora Biran , Matthew Cushing , Robert Drehmel , Allen Gavin , Mark Kautzman , Jamie Kuesel , Ming-I Lin , David Luick , James Marcella , Mark Maxson , Eric Mejdrich , Adam Muff , Clarence Ogilvie , Charles Woodruff
IPC分类号: G06F13/36
CPC分类号: G06F13/4059
摘要: A high speed computer processor system has a high speed interface for a graphics processor. A preferred embodiment combines a PowerPC microprocessor called the Giga-Processor Ultralite (GPUL) 110 from International Business Machines Corporation (IBM) with a high speed interface on a multi-chip module.
摘要翻译: 高速计算机处理器系统具有用于图形处理器的高速接口。 优选实施例将来自国际商业机器公司(IBM)的称为Giga-Processor Ultralite(GPUL)110的PowerPC微处理器与多芯片模块上的高速接口相结合。
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3.
公开(公告)号:US20060190655A1
公开(公告)日:2006-08-24
申请号:US11064567
申请日:2005-02-24
IPC分类号: G06F13/36
CPC分类号: G06F13/4027
摘要: An apparatus and method to provide tag mapping between bus domains across a bus bridge. The preferred embodiments provide a simple tag mapping design while maintaining unique IDs for all outstanding transactions for an overall increase in computer system performance. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI bus). In preferred embodiments, the transaction mapping logic ensures that transactions generated by any logical unit (CPU) appear to originate from a single logical unit.
摘要翻译: 一种通过总线桥提供总线域之间的标签映射的装置和方法。 优选实施例提供简单的标签映射设计,同时为所有未完成的事务维护唯一的ID,以便计算机系统性能的总体增加。 优选实施例是用于来自国际商业机器公司(IBM)的GPUL PowerPC微处理器的GPUL总线与输出高速接口(MPI总线)之间的总线桥。 在优选实施例中,事务映射逻辑确保由任何逻辑单元(CPU)生成的事务似乎源于单个逻辑单元。
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