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    Flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage
    1.
    发明授权
    Flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage 失效
    平板显示器，其中低电压行和列地址信号控制高得多的像素激活电压

    公开(公告)号：US5616991A

    公开(公告)日：1997-04-01

    申请号：US530562

    申请日：1995-09-19

    申请人： Stephen L. Casper ,  Glen E. Hush ,  Thomas W. Voshell

    发明人： Stephen L. Casper ,  Glen E. Hush ,  Thomas W. Voshell

    IPC分类号： G09G3/00 ,  G09G3/20 ,  G09G3/22 ,  H01J31/12 ,  H05B33/12 ,  H05B41/36 ,  H05B41/392

    CPC分类号： G09G3/006 ,  G09G3/22 ,  H01J31/127 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319 ,  Y10S315/07

    摘要： This invention is directed to an improvement of a field emission display architecture in which low-voltage row and column address signals control a much higher pixel activation voltage. Instead of using a pair of series-coupled transistors in the emitter node grounding path as in the original architecture (one of which is gated by a column signal and the other of which is gated by a row signal), only a single transistor is utilized in the emitter node grounding path, thus eliminating an intermediate node between the two transistors that was responsible for unwanted emissions under certain operating conditions. In a preferred embodiment of the invention, a current regulating resistor is placed in the grounding path in series with the primary grounding transistor, with the resistor being directly coupled to ground. Additionally, for the preferred embodiment of the invention, the gate of the grounding transistor is coupled via a second field-effect transistor to either a row signal or a column signal. In the case where the gate of the first transistor is coupled to a row signal, the gate of the second transistor is coupled to a column signal. Likewise, where the gate of the first transistor is coupled to a column signal, the gate of the second transistor is coupled to a row signal. Numerous other equivalent circuits are possible, and several examples of such equivalent circuits are depicted in this disclosure.

    摘要翻译： 本发明涉及一种场致发射显示结构的改进，其中低电压行和列地址信号控制高得多的像素激活电压。 不像原始架构（其中之一由列信号门控，另一个由行信号门控）在发射极节点接地路径中使用一对串联耦合晶体管，而是仅使用单个晶体管 在发射极节点接地路径中，从而消除了在某些工作条件下负责无用发射的两个晶体管之间的中间节点。 在本发明的优选实施例中，电流调节电阻器被放置在与主接地晶体管串联的接地路径中，电阻器直接耦合到地。 此外，对于本发明的优选实施例，接地晶体管的栅极经由第二场效应晶体管耦合到行信号或列信号。 在第一晶体管的栅极耦合到行信号的情况下，第二晶体管的栅极耦合到列信号。 类似地，在第一晶体管的栅极耦合到列信号的情况下，第二晶体管的栅极耦合到行信号。 许多其他等效电路是可能的，并且在本公开中描述了这些等效电路的几个示例。

    Flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage
    3.
    发明授权
    Flat panel display in which low-voltage row and column address signals control a much higher pixel activation voltage 失效
    平板显示器，其中低电压行和列地址信号控制高得多的像素激活电压

    公开(公告)号：US5783910A

    公开(公告)日：1998-07-21

    申请号：US790205

    申请日：1997-02-05

    申请人： Stephen L. Casper ,  Glen E. Hush ,  Thomas W. Voshell

    发明人： Stephen L. Casper ,  Glen E. Hush ,  Thomas W. Voshell

    IPC分类号： G09G3/00 ,  G09G3/20 ,  G09G3/22 ,  H01J31/12 ,  H05B33/12 ,  H05B41/36 ,  H05B41/392

    CPC分类号： G09G3/006 ,  G09G3/22 ,  H01J31/127 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319 ,  Y10S315/07

    摘要： This invention is directed to an improvement of a field emission display architecture in which low-voltage row and column address signals control a much higher pixel activation voltage. Instead of using a pair of series-coupled transistors the emitter node grounding path as in the original architecture (one of which is gated by a column signal d the other of which is gated by a row signal), only a single transistor is utilized in the emitter node grounding path thus eliminating an intermediate node between the two transistors that was responsible for unwanted emissions under certain operating conditions. In a preferred embodiment of the invention, a current regulating resistor is placed in the grounding path in series with the primary grounding transistor, with the resistor being directly coupled to ground. Additionally, for the preferred embodiment of the invention, the gate of the grounding transistor is coupled via a second field-effect transistor to either a row signal or a column signal. In the case where the gate of the first transistor is coupled to a row signal, the gate of the second transistor is coupled to a column signal. Likewise, where the gate of the first transistor is coupled to a column signal, the gate of the second transistor is coupled to a row signal. Numerous other equivalent circuits are possible, and several examples of such equivalent circuits are depicted in this disclosure.

    摘要翻译： 本发明涉及一种场致发射显示结构的改进，其中低电压行和列地址信号控制高得多的像素激活电压。 代替使用一对串联耦合晶体管，如在原始架构（其中之一由列信号门控，其中另一个由行信号门控）的发射极节点接地路径，仅使用单个晶体管 发射极节点接地路径因此消除了在某些操作条件下负责不需要的发射的两个晶体管之间的中间节点。 在本发明的优选实施例中，电流调节电阻器被放置在与主接地晶体管串联的接地路径中，电阻器直接耦合到地。 此外，对于本发明的优选实施例，接地晶体管的栅极经由第二场效应晶体管耦合到行信号或列信号。 在第一晶体管的栅极耦合到行信号的情况下，第二晶体管的栅极耦合到列信号。 类似地，在第一晶体管的栅极耦合到列信号的情况下，第二晶体管的栅极耦合到行信号。 许多其他等效电路是可能的，并且在本公开中描述了这些等效电路的几个示例。

    High efficiency field emission display
    4.
    发明授权
    High efficiency field emission display 失效
    高效场发射显示

    公开(公告)号：US5656887A

    公开(公告)日：1997-08-12

    申请号：US513544

    申请日：1995-08-10

    申请人： Thomas W. Voshell ,  Glen E. Hush

    发明人： Thomas W. Voshell ,  Glen E. Hush

    IPC分类号： H01J29/46

    CPC分类号： H01J29/467 ,  H01J29/482 ,  H01J31/127

    摘要： In a field emission display, a microchannel plate is mounted between an emitter panel and a display screen. The inner walls of the cylindrical passageways through the microchannel plate are coated with a conductive layer which is connected to a plate voltage. Electrons emitted from the emitter panel travel through cylindrical passageways in the microchannel plate toward the display screen. As electrons pass through the microchannels, the electrons are multiplied and collimated to increase the intensity of the light emitted from the screen and to reduce the pixel size.

    摘要翻译： 在场发射显示器中，微通道板安装在发射器面板和显示屏之间。 通过微通道板的圆柱形通道的内壁涂覆有与板电压连接的导电层。 从发射器面板发射的电子通过微通道板中的圆柱形通道朝向显示屏行进。 当电子通过微通道时，电子被倍增和准直以增加从屏幕发射的光的强度并减小像素尺寸。

    Magnetic tunneling junction antifuse device
    6.
    发明授权
    Magnetic tunneling junction antifuse device 有权
    磁隧道结反熔丝装置

    公开(公告)号：US07176065B2

    公开(公告)日：2007-02-13

    申请号：US11123916

    申请日：2005-05-06

    申请人： Mirmajid Seyyedy ,  Mark E. Tuttle ,  Glen E. Hush

    发明人： Mirmajid Seyyedy ,  Mark E. Tuttle ,  Glen E. Hush

    IPC分类号： H01L21/82

    CPC分类号： H01L27/222 ,  G11C11/005 ,  G11C11/15 ,  G11C17/16 ,  G11C17/165 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least some of the MRAM cells are designed to function as antifuse devices whereby the application of a selected electrical potential can short the antifuse device to thereby affect the functionality of the MRAM device.

    摘要翻译： 具有由固定磁性层形成的多个MRAM单元的MRAM器件，第二软磁性层和介于该固定磁性层与软磁性层之间的电介质层。 MRAM单元都是同时形成的，并且至少一些MRAM单元被设计为用作反熔丝器件，由此施加所选择的电位可以使反熔丝器件短路从而影响MRAM器件的功能。

    Magnetic tunneling junction antifuse device
    7.
    发明授权
    Magnetic tunneling junction antifuse device 有权
    磁隧道结反熔丝装置

    公开(公告)号：US06919613B2

    公开(公告)日：2005-07-19

    申请号：US10820415

    申请日：2004-04-08

    申请人： Mirmajid Seyyedy ,  Mark E. Tuttle ,  Glen E. Hush

    发明人： Mirmajid Seyyedy ,  Mark E. Tuttle ,  Glen E. Hush

    IPC分类号： G11C11/15 ,  G11C17/16 ,  H01L29/00

    CPC分类号： H01L27/222 ,  G11C11/005 ,  G11C11/15 ,  G11C17/16 ,  G11C17/165 ,  H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least some of the MRAM cells are designed to function as antifuse devices whereby the application of a selected electrical potential can short the antifuse device to thereby affect the functionality of the MRAM device.

    摘要翻译： 具有由固定磁性层形成的多个MRAM单元的MRAM器件，第二软磁性层和介于该固定磁性层与软磁性层之间的电介质层。 MRAM单元都是同时形成的，并且至少一些MRAM单元被设计为用作反熔丝器件，由此施加所选择的电位可以使反熔丝器件短路从而影响MRAM器件的功能。

    Matrix addressable display with electrostatic discharge protection
    9.
    发明授权
    Matrix addressable display with electrostatic discharge protection 失效
    具有静电放电保护的矩阵可寻址显示

    公开(公告)号：US06356250B1

    公开(公告)日：2002-03-12

    申请号：US09640826

    申请日：2000-08-16

    申请人： David A. Cathey ,  Glen E. Hush ,  Manny K. F. Ma ,  Craig M. Dunham ,  David A. Zimlich

    发明人： David A. Cathey ,  Glen E. Hush ,  Manny K. F. Ma ,  Craig M. Dunham ,  David A. Zimlich

    IPC分类号： G09G328

    CPC分类号： H01J31/127 ,  H01J3/022 ,  H01J2201/319 ,  H01J2329/92

    摘要： A field emission display includes electrostatic discharge protection circuits coupled to an emitter substrate and an extraction grid. In the preferred embodiment, the electrostatic discharge circuit includes diodes reverse biased between grid sections and a first reference potential or between row lines and a second reference potential. The diodes provide a current path to discharge static voltage and thereby prevent a high voltage differential from being maintained between the emitter sets and the extraction grids. The diodes thereby prevent the emitter sets from emitting electrons at a high rate that may damage or destroy the emitter sets. In one embodiment, the diodes are coupled directly between the grid sections and the row lines. In one embodiment, the diodes are formed in an insulative layer carrying the grid sections. In another embodiment, the diodes are integrated into the emitter substrate.

    摘要翻译： 场发射显示器包括耦合到发射极衬底和提取栅极的静电放电保护电路。 在优选实施例中，静电放电电路包括在网格部分和第一参考电位之间或在行线和第二参考电位之间反向偏置的二极管。 二极管提供电流路径来放电静电压，从而防止在发射极组和提取栅之间保持高电压差。 因此，二极管可防止发射极组以可能损坏或破坏发射极组的高速率发射电子。 在一个实施例中，二极管直接连接在网格部分和行线之间。 在一个实施例中，二极管形成在承载网格部分的绝缘层中。 在另一个实施例中，二极管被集成到发射器衬底中。

    Analog to pulse width converter for field emission displays
    10.
    发明授权
    Analog to pulse width converter for field emission displays 失效
    用于场发射显示器的模拟脉冲宽度转换器

    公开(公告)号：US6069451A

    公开(公告)日：2000-05-30

    申请号：US991094

    申请日：1997-12-15

    申请人： Glen E. Hush ,  Robert R. Rotzoll

    发明人： Glen E. Hush ,  Robert R. Rotzoll

    IPC分类号： G09G3/10

    CPC分类号： G09G3/22 ,  G09G3/2014 ,  G09G2310/0259

    摘要： A field emission display ("FED") is disclosed having a gray scale range. Input into the FED, initially, is an analog signal input. The FED, by employing an analog to pulse width converter, subsequently converts the analog input to a pulse width output, the width of which directly correlates to the amplitude of the analog input signal. To achieve this design, the analog to pulse width converter comprises a sampler for sampling the analog signal at a predetermined frequency, thereby creating a plurality of samples corresponding to the input voltage. Further, the converter comprises means for holding each of the samples. The output of the holding means is subsequently coupled with a load responsive to the output of the holding means. In one embodiment of the present invention, this load comprises a voltage controlled resistance. The voltage controlled resistance can comprise a convertor for converting each of the samples to a current source and a load for creating a voltage ramp. The voltage ramp is subsequently input to a buffer for comparing the load output with a predetermined threshold. By this design, a pulse width signal is thereby created, the width of which ranges between a minimum and a maximum value, the minimum and the maximum values corresponding to the gray scale range.

    摘要翻译： 公开了具有灰度范围的场发射显示（“FED”）。 最初输入FED是模拟信号输入。 FED通过采用模拟脉冲宽度转换器，随后将模拟输入转换为脉冲宽度输出，其宽度与模拟输入信号的幅度直接相关。 为了实现这一设计，模拟脉冲宽度转换器包括一个采样器，用于以预定频率对模拟信号进行采样，从而产生对应于输入电压的多个采样。 此外，转换器包括用于保持每个样品的装置。 随后，保持装置的输出与响应于保持装置的输出的负载耦合。 在本发明的一个实施例中，该负载包括受电压控制的电阻。 电压控制电阻可以包括用于将每个样本转换成电流源的转换器和用于产生电压斜坡的负载。 随后将电压斜坡输入到缓冲器，用于将负载输出与预定阈值进行比较。 通过这种设计，由此产生一个脉冲宽度信号，其宽度范围在最小值和最大值之间，最小值和最大值对应于灰度级范围。