公开(公告)号：US20240203873A1

公开(公告)日：2024-06-20

申请号：US18065632

申请日：2022-12-14

Applicant: GlobalFoundries Singapore Pte. Ltd.

Inventor： SHU HUI LEE ,  JUAN BOON TAN ,  JIANXUN SUN ,  MYO AUNG MAUNG ,  HARI BALAN

IPC: H01L23/525 ,  H01L27/01

CPC classification number: H01L23/5252 ,  H01L27/01 ,  H01L28/00

Abstract: An antifuse device has a first contact structure and a second contact structure in a substrate. The first contact structure has a first contact side adjoining a second contact side and forming a first contact corner having an acute angle. The second contact structure is spaced from and not electrically connected to the first contact structure. The antifuse device further includes a first dummy structure in the substrate, adjacent to the first contact structure. The first dummy structure has a first dummy side nearest to and spaced from the first contact side of the first contact structure.

公开(公告)号：US20240079319A1

公开(公告)日：2024-03-07

申请号：US17930410

申请日：2022-09-07

Applicant: GlobalFoundries Singapore Pte. Ltd.

Inventor： SHU HUI LEE ,  JUAN BOON TAN ,  JIANXUN SUN ,  HARI BALAN ,  MYO AUNG MAUNG

IPC: H01L23/525

CPC classification number: H01L23/5256

Abstract: An eFuse structure is provided, the structure comprising a first fuse link having a first side. The first fuse link having a first indentation on the first side, the first indentation having a non-linear profile. A first dummy structure may be laterally spaced from the first indentation of the first fuse link.

公开(公告)号：US20230320104A1

公开(公告)日：2023-10-05

申请号：US17657363

申请日：2022-03-31

Applicant: GlobalFoundries Singapore Pte. Ltd.

Inventor： JIA RUI THONG ,  JIANXUN SUN ,  ENG HUAT TOH ,  JUAN BOON TAN

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2436 ,  H01L45/1253 ,  H01L45/1608

Abstract: The disclosed subject matter relates generally to memory devices and a method of forming the same. More particularly, the present disclosure relates to three terminal resistive random-access (ReRAM) memory structures having two bottom electrodes and one top electrode. The present disclosure provides a structure including a first bottom electrode having an upper surface, a second bottom electrode having an upper surface, a switching layer on the upper surface of the first electrode and the upper surface of the second electrode, an oxygen enhancement layer on the switching layer, and a top electrode on the oxygen enhancement layer, the top electrode is positioned above the first bottom electrode and the second bottom electrode.

公开(公告)号：US20220158093A1

公开(公告)日：2022-05-19

申请号：US17096948

申请日：2020-11-13

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： JIA RUI THONG ,  JIANXUN SUN ,  YI JIANG ,  JUAN BOON TAN

IPC: H01L45/00 ,  H01L27/24

Abstract: The disclosed subject matter relates generally to memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices. The present disclosure provides a memory device including a first electrode having tapered sides and a top surface, in which the sides taper towards each other as they meet the top surface, a dielectric layer disposed on and conforming to the tapered sides of the first electrode, a resistive layer in contact with the top surface of the first electrode and the dielectric layer, and a second electrode disposed on the resistive layer.

公开(公告)号：US20220149277A1

公开(公告)日：2022-05-12

申请号：US17094819

申请日：2020-11-11

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： JIANXUN SUN ,  JUAN BOON TAN ,  TUPEI CHEN

IPC: H01L45/00 ,  H01L27/24

Abstract: A memory device and method of making the same is provided. The memory device comprises a first electrode having a length along a first axis, a second electrode having a length along a second axis that is perpendicular to the first axis, and a switching layer adjacent to the first electrode. A portion of the switching layer is positioned between a first electrode edge and a second electrode portion. The cross-sections of the first and second electrodes may have a polygonal shape.

公开(公告)号：US20230217843A1

公开(公告)日：2023-07-06

申请号：US17647006

申请日：2022-01-04

Applicant: GlobalFoundries Singapore Pte. Ltd.

Inventor： JIANXUN SUN ,  RAMASAMY CHOCKALINGAM ,  JUAN BOON TAN

IPC: H01L45/00

CPC classification number: H01L45/1246 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/1675

Abstract: A semiconductor memory device is provided. The memory device includes a first electrode, a resistive layer, and a second electrode. The resistive layer is arranged over the first electrode. The second electrode is arranged over the resistive layer. The second electrode includes a lower surface and an extension extending from under the lower surface. The extension is at least partially arranged within the resistive layer.

公开(公告)号：US20220158090A1

公开(公告)日：2022-05-19

申请号：US17096950

申请日：2020-11-13

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： JIANXUN SUN ,  JUAN BOON TAN ,  TUPEI CHEN

IPC: H01L45/00 ,  H01L27/24

Abstract: The disclosed subject matter relates generally to memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices. The present disclosure provides a memory device including a first electrode having tapered sides that converge at a top of the first electrode, a dielectric layer disposed on and conforming to the tapered sides of the first electrode, a resistive layer in contact with the top of the first electrode and the dielectric layer, and a second electrode disposed on the resistive layer.