公开(公告)号：US20210335731A1

公开(公告)日：2021-10-28

申请号：US16855185

申请日：2020-04-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor JAIN ,  Ajay RAMAN ,  Sebastian T. VENTRONE ,  John J. ELLIS-MONAGHAN ,  Siva P. ADUSUMILLI ,  Yves T. NGU

IPC: H01L23/00

Abstract: The present disclosure relates to an active x-ray attack prevention structure for secure integrated circuits. In particular, the present disclosure relates to a structure including a functional circuit, and at least one latchup sensitive diode circuit configured to induce a latchup condition in the functional circuit, placed in proximity of the functional circuit.

公开(公告)号：US20240088242A1

公开(公告)日：2024-03-14

申请号：US17943925

申请日：2022-09-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Johnatan A. KANTAROVSKY ,  Rebouh BENELBAR ,  Ajay RAMAN ,  Michel J. ABOU-KHALIL ,  Rajendran KRISHNASAMY ,  Randy L. WOLF

IPC: H01L29/417 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/41775 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/401 ,  H01L29/66462 ,  H01L29/7786

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high-electron-mobility transistors and methods of manufacture. A structure includes: a semiconductor layer on a semiconductor material; a gate structure on the semiconductor layer; a drain region comprising the semiconductor layer and which is adjacent to the gate structure; an ohmic contact which includes at least one terminal connection connecting to the semiconductor material, the ohmic contact being adjacent to the drain region and spaced away from the gate structure; and a capacitance reducing structure adjacent to the drain region.

公开(公告)号：US20240006491A1

公开(公告)日：2024-01-04

申请号：US17852966

申请日：2022-06-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Uppili S. RAGHUNATHAN ,  Vibhor JAIN ,  Qizhi LIU ,  Yves T. NGU ,  Ajay RAMAN ,  Rajendran KRISHNASAMY ,  Alvin J. JOSEPH

IPC: H01L29/10 ,  H01L29/08

CPC classification number: H01L29/1095 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with a stepped emitter and methods of manufacture. The structure includes: a collector; a base over the collector; and an emitter over the base, the emitter comprising at least one stepped feature over the base.

公开(公告)号：US20220115329A1

公开(公告)日：2022-04-14

申请号：US17070377

申请日：2020-10-14

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Johnatan A. KANTAROVSKY ,  Vibhor JAIN ,  Siva P. ADUSUMILLI ,  Ajay RAMAN ,  Sebastian T. VENTRONE ,  Yves T. NGU

IPC: H01L23/552 ,  H01L23/00 ,  H01L49/02 ,  H01L23/522

Abstract: The present disclosure relates to integrated circuits, and more particularly, to an anti-tamper x-ray blocking package for secure integrated circuits and methods of manufacture and operation. In particular, the present disclosure relates to a structure including: one or more devices on a front side of a semiconductor material; a plurality of patterned metal layers under the one or more devices, located and structured to protect the one or more devices from an active intrusion; an insulator layer between the plurality of patterned metal layers; and at least one contact providing an electrical connection through the semiconductor material to a front side of the plurality of metals.