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公开(公告)号：US20240361529A1
公开(公告)日：2024-10-31
申请号：US18139128
申请日：2023-04-25
Applicant: GlobalFoundries U.S. Inc.
Inventor： Keith Donegan , Thomas Houghton , Yusheng Bian , Karen Nummy , Kevin Dezfulian , Takako Hirokawa
CPC classification number: G02B6/305 , G02B6/42 , G02B6/4206
Abstract: Structures including a cavity adjacent to an edge coupler and methods of forming such structures. The structure comprises a semiconductor substrate including a cavity with a sidewall, a dielectric layer on the semiconductor substrate, and an edge coupler on the dielectric layer. The structure further comprises a fill region including a plurality of fill features adjacent to the edge coupler. The fill region includes a reference marker at least partially surrounded by the plurality of fill features, and the reference marker has a perimeter that surrounds a surface area of the dielectric layer, and the surface area overlaps with a portion of the sidewall of the cavity.
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Patent Agency Ranking
公开(公告)号：US11880066B2
公开(公告)日：2024-01-23
申请号：US17847399
申请日：2022-06-23
Applicant: GlobalFoundries U.S. Inc.
Inventor： Kevin Dezfulian , Yusheng Bian
CPC classification number: G02B6/1228 , G02B6/1223 , G02B2006/12097
Abstract: Structures including a waveguide core and methods of fabricating a structure including a waveguide core. The structure comprises a photonics chip including a first chip region, a second chip region, a first waveguide core in the first chip region, and a second waveguide core in the second chip region. The first chip region adjoins the second chip region along a boundary. The first waveguide core includes a first tapered section, and the second waveguide core includes a second tapered section positioned across the boundary from the first tapered section. The first tapered section has a first width dimension that increases with increasing distance from the boundary, and the second tapered section has a second width dimension that increases with increasing distance from the boundary.
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公开(公告)号：US20240427094A1
公开(公告)日：2024-12-26
申请号：US18212754
申请日：2023-06-22
Applicant: GlobalFoundries U.S. Inc.
Inventor： Keith Donegan , Takako Hirokawa , Yusheng Bian , Thomas Houghton , Kevin Dezfulian , Carrie Yurkon
Abstract: Structures including a calibration marker adjacent to a photonic structure and methods of forming such structures. The structure comprises a semiconductor substrate, a photonic structure, and a back-end-of-line stack over the semiconductor substrate. The back-end-of-line stack includes a plurality of fill features, an exclusion area surrounded by the plurality of fill features, and a calibration marker in the exclusion area. The calibration marker is disposed adjacent to the photonic structure, and the calibration marker includes a feature having a predetermined dimension.
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公开(公告)号：US20230417990A1
公开(公告)日：2023-12-28
申请号：US17847399
申请日：2022-06-23
Applicant: GlobalFoundries U.S. Inc.
Inventor： Kevin Dezfulian , Yusheng Bian
CPC classification number: G02B6/1228 , G02B6/4296 , G02B2006/12097
Abstract: Structures including a waveguide core and methods of fabricating a structure including a waveguide core. The structure comprises a photonics chip including a first chip region, a second chip region, a first waveguide core in the first chip region, and a second waveguide core in the second chip region. The first chip region adjoins the second chip region along a boundary. The first waveguide core includes a first tapered section, and the second waveguide core includes a second tapered section positioned across the boundary from the first tapered section. The first tapered section has a first width dimension that increases with increasing distance from the boundary, and the second tapered section has a second width dimension that increases with increasing distance from the boundary.
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公开(公告)号：US20250085491A1
公开(公告)日：2025-03-13
申请号：US18243701
申请日：2023-09-08
Applicant: GlobalFoundries U.S. Inc.
Inventor： Yusheng Bian , Theodore Letavic , Kenneth J. Giewont , Kevin Dezfulian , Koushik Ramachandran
Abstract: Photonic structures including multiple input/output optical couplers and methods of forming such photonic structures. The photonic structure comprises a light source and a photonics chip including a semiconductor substrate. The photonic structure further comprises a first mirror disposed at a first height relative to a top surface of the semiconductor substrate and a second mirror disposed at a second height relative to the top surface of the semiconductor substrate. The first mirror is configured to reflect first light from the light source to the photonics chip, and the second mirror is configured to reflect second light from the light source to the photonics chip. The first mirror is disposed between the second mirror and the light source, and the second height is different from the first height.
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公开(公告)号：US20240288631A1
公开(公告)日：2024-08-29
申请号：US18115046
申请日：2023-02-28
Applicant: GlobalFoundries U.S. Inc.
Inventor： Yusheng Bian , Kevin Dezfulian , Kenneth Giewont , Karen Nummy
IPC: G02B6/12
CPC classification number: G02B6/12004 , G02B2006/12061 , G02B6/136
Abstract: Structures for a waveguide escalator and methods of forming such structures. A structure comprises a first waveguide core, and a back-end-of-line stack including a first dielectric layer, a second dielectric layer on the first dielectric layer, an opening in the second dielectric layer, a second waveguide core including a section that overlaps with a section of the first waveguide core, and a plurality of third waveguide cores disposed between the section of the first waveguide core and the section of the second waveguide core. The plurality of third waveguide cores are positioned inside the opening in the second dielectric layer, the first dielectric layer comprises a first material with a first refractive index, and the second dielectric layer comprises a second material with a second refractive index different from the first refractive index.
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