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公开(公告)号:US20230395715A1
公开(公告)日:2023-12-07
申请号:US17830678
申请日:2022-06-02
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Haiting WANG , Hong YU , Zhenyu HU
CPC classification number: H01L29/7838 , H01L29/0847 , H01L29/785 , H01L29/66795
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a multi-channel replacement metal gate device and methods of manufacture. The structure includes: a fully depleted semiconductor on insulator substrate; a plurality of fin structures over the fully depleted semiconductor on insulator substrate; and a metal gate structure spanning over the plurality of fin structures and the fully depleted semiconductor on insulator substrate.
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公开(公告)号:US20230299181A1
公开(公告)日:2023-09-21
申请号:US18324489
申请日:2023-05-26
Applicant: GlobalFoundries U.S. Inc.
Inventor: Haiting WANG , Hong YU , Zhenyu HU
IPC: H01L29/66 , H01L29/78 , H01L29/06 , H01L21/762 , H01L29/45 , H01L21/285 , H01L29/417
CPC classification number: H01L29/6681 , H01L29/7851 , H01L29/0653 , H01L21/76224 , H01L29/45 , H01L21/28518 , H01L29/41791
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to single fin structures and methods of manufacture. The structure includes: an active single fin structure; a plurality of dummy fin structures on opposing sides of the active single fin structure; source and drain regions formed on the active single fin structure and the dummy fin structures; recessed shallow trench isolation (STI) regions between the dummy fin structures and the active single fin structure and below a surface of the dummy fin structures; and contacts formed on the source and drain regions of the active single fin structure with a spacing of at least two dummy fin structures on opposing sides of the contacts.
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公开(公告)号:US20210151581A1
公开(公告)日:2021-05-20
申请号:US16688267
申请日:2019-11-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Haiting WANG , Hong YU , Zhenyu HU
IPC: H01L29/66 , H01L29/78 , H01L29/06 , H01L29/417 , H01L29/45 , H01L21/285 , H01L21/762
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to single fin structures and methods of manufacture. The structure includes: an active single fin structure; a plurality of dummy fin structures on opposing sides of the active single fin structure; source and drain regions formed on the active single fin structure and the dummy fin structures; recessed shallow trench isolation (STI) regions between the dummy fin structures and the active single fin structure and below a surface of the dummy fin structures; and contacts formed on the source and drain regions of the active single fin structure with a spacing of at least two dummy fin structures on opposing sides of the contacts.
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