摘要:
A processor core, comprises one or more vector units operable to change between a fine-grained vector mode having a shorter maximum vector length and a coarse-grained vector mode having a longer maximum vector length. Changing vector modes comprises halting all instruction stream execution in the core, flushing one or more registers in a register space, reconfiguring one or more vector registers in the register space, and restarting instruction execution in the core.
摘要:
A processor core, comprises one or more vector units operable to change between a fine-grained vector mode having a shorter maximum vector length and a coarse-grained vector mode having a longer maximum vector length. Changing vector modes comprises halting all instruction stream execution in the core, flushing one or more registers in a register space, reconfiguring one or more vector registers in the register space, and restarting instruction execution in the core.
摘要:
A processor core, comprises one or more vector units operable to change between a fine-grained vector mode having a shorter maximum vector length and a coarse-grained vector mode having a longer maximum vector length. Changing vector modes comprises halting all instruction stream execution in the core, flushing one or more registers in a register space, reconfiguring one or more vector registers in the register space, and restarting instruction execution in the core.
摘要:
A vector processor or vector processing computer has a first vector register operable to store two or more vector elements that together comprise a single first large integer and a second vector register operable to store two or more vector elements that together comprise a single second large integer. An adder having a carry-in bit is operable to add the large integer in the first vector register to the large integer in the second vector register by using the carry-in bit to add sequential elements of the vector registers.
摘要:
A multiprocessor computer system has a plurality of first processors having a first addressable memory space, and a plurality of second processors having a second addressable memory space. The second addressable memory space is of a different size than the first addressable memory space, and the first addressable memory space and second addressable memory space comprise a part of the same common address space.
摘要:
A multiprocessor computer system has a plurality of first processors having a first addressable memory space, and a plurality of second processors having a second addressable memory space. The second addressable memory space is of a different size than the first addressable memory space, and the first addressable memory space and second addressable memory space comprise a part of the same common address space.
摘要:
An automated analyzer for reagent cards having a leading end, a trailing end and a length between the leading end and the trailing end comprises a travel surface assembly having a card travel surface and an edge. A test analyzing mechanism is adjacent to the travel surface, and a waste receptacle is adjacent to the edge below the travel surface. The waste receptacle has a side and a waste cavity. A ramp member positioned below the travel surface has an end and a sloped surface, and is movable between an extended position where the sloped surface extends into the waste cavity, and a retracted position where the end is spaced from the side a distance greater than the length of the reagent card. A moving mechanism operably coupled with the ramp member is configured to move the ramp member between the extended position and the retracted position.
摘要:
A method of manufacturing electronic circuits including generating CAD data, a bill of materials and an approved component vendor list for an electronic circuit and employing the CAD data, the bill of materials and the approved component vendor list for automatically generating a pick & place machine-specific component loading specification, a pick & place machine-specific component placement sequence and pick & place machine-specific component data for governing the operation of at least one specific pick & place machine in a manufacturing line.
摘要:
The present invention is directed to a method for the treatment of epilepsy and related disorders comprising administering to a subject in need thereof, co-therapy with a therapeutically effective amount of a benzo-heteroaryl sulfamide derivative as described herein and a therapeutically effective amount of one or more anticonvulsant and/or anti-epileptic agents.
摘要:
A method of manufacturing electronic circuits including generating CAD data, a bill of materials and an approved component vendor list for an electronic circuit and employing the CAD data, the bill of materials and the approved component vendor list for automatically generating a pick & place machine-specific component loading specification, a pick & place machine-specific component placement sequence and pick & place machine-specific component data for governing the operation of at least one specific pick & place machine in a manufacturing line.