公开(公告)号：US20070227892A1

公开(公告)日：2007-10-04

申请号：US11696094

申请日：2007-04-03

申请人： Guang-Ren Shen ,  Wei-Lin Chen

发明人： Guang-Ren Shen ,  Wei-Lin Chen

IPC分类号： C25D5/02

CPC分类号： C25D5/02 ,  C23C18/32 ,  C23C18/42 ,  C25D5/12 ,  C25D5/48 ,  C25D5/56

摘要： A method for forming a fluid injection apparatus is disclosed. A patterned sacrificial layer is formed overlying a substrate. A electroplate seed layer is formed on the patterned sacrificial layer. A structural layer is formed overlying the electroplate seed layer and the substrate. The structural layer is patterned to form a nozzle. The electroplate seed layer in the nozzle is removed. The sacrificial layer is removed to form a fluid chamber. A protective layer is formed to selectively cover the structural layer and the electroplate seed layer.

摘要翻译： 公开了一种用于形成流体注射装置的方法。 在衬底上形成图案化的牺牲层。 在图案化的牺牲层上形成电镀种子层。 在电镀种子层和基底上形成结构层。 图案化结构层以形成喷嘴。 去除喷嘴中的电镀种子层。 去除牺牲层以形成流体室。 形成保护层以选择性地覆盖结构层和电镀种子层。

公开(公告)号：US08604477B2

公开(公告)日：2013-12-10

申请号：US13089298

申请日：2011-04-18

申请人： Wu-Hsiung Lin ,  Po-Hsueh Chen ,  Shin-Shueh Chen ,  Guang-Ren Shen ,  Jia-Hong Ye

发明人： Wu-Hsiung Lin ,  Po-Hsueh Chen ,  Shin-Shueh Chen ,  Guang-Ren Shen ,  Jia-Hong Ye

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00

CPC分类号： H01L27/1255 ,  G02F1/136213 ,  G02F2201/40 ,  G02F2202/10 ,  G02F2203/01 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/7869

摘要： A pixel structure and a manufacturing method thereof are provided. In the pixel structure, an electrode of a storage capacitor is formed when an active layer is formed, and the electrode and the active layer are made of the same material. The material of the electrode and the active layer can be an oxide semiconductor with high transmittance. Therefore, a stable display frame of the pixel structure can be provided by the storage capacitor, an aperture ratio of the pixel structure can be improved, and power consumption can be further reduced.

摘要翻译： 提供像素结构及其制造方法。 在像素结构中，当形成有源层时形成存储电容器的电极，并且电极和有源层由相同的材料制成。 电极和有源层的材料可以是具有高透射率的氧化物半导体。 因此，可以通过存储电容器提供像素结构的稳定的显示框，可以提高像素结构的开口率，并且能够进一步降低功耗。

公开(公告)号：US08154061B2

公开(公告)日：2012-04-10

申请号：US12500609

申请日：2009-07-10

申请人： Chuan-Sheng Wei ,  Guang-Ren Shen ,  Chang-Yu Huang ,  Pei-Ming Chen ,  Sheng-Chao Liu ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Chuan-Sheng Wei ,  Guang-Ren Shen ,  Chang-Yu Huang ,  Pei-Ming Chen ,  Sheng-Chao Liu ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L31/062

CPC分类号： H01L29/42384 ,  H01L29/41733 ,  H01L29/66765

摘要： A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other.

摘要翻译： 提供底栅薄膜晶体管和有源阵列基板。 底栅薄膜晶体管包括栅极，栅极绝缘层，半导体层，多个源极和多个漏极。 栅极绝缘层设置在栅极上。 半导体层设置在栅极绝缘层上并位于栅极上方。 半导体层和栅极的面积比约为0.001〜0.9。 源极彼此电连接，并且漏极彼此电连接。

公开(公告)号：US20120138932A1

公开(公告)日：2012-06-07

申请号：US13089298

申请日：2011-04-18

申请人： Wu-Hsiung Lin ,  Po-Hsueh Chen ,  Shin-Shueh Chen ,  Guang-Ren Shen ,  Jia-Hong Ye

发明人： Wu-Hsiung Lin ,  Po-Hsueh Chen ,  Shin-Shueh Chen ,  Guang-Ren Shen ,  Jia-Hong Ye

IPC分类号： H01L29/04

CPC分类号： H01L27/1255 ,  G02F1/136213 ,  G02F2201/40 ,  G02F2202/10 ,  G02F2203/01 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/7869

摘要： A pixel structure and a manufacturing method thereof are provided. In the pixel structure, an electrode of a storage capacitor is formed when an active layer is formed, and the electrode and the active layer are made of the same material. The material of the electrode and the active layer can be an oxide semiconductor with high transmittance. Therefore, a stable display frame of the pixel structure can be provided by the storage capacitor, an aperture ratio of the pixel structure can be improved, and power consumption can be further reduced.

摘要翻译： 提供像素结构及其制造方法。 在像素结构中，当形成有源层时形成存储电容器的电极，并且电极和有源层由相同的材料制成。 电极和有源层的材料可以是具有高透射率的氧化物半导体。 因此，可以通过存储电容器提供像素结构的稳定的显示框，可以提高像素结构的开口率，并且能够进一步降低功耗。

公开(公告)号：US20110215324A1

公开(公告)日：2011-09-08

申请号：US12779955

申请日：2010-05-14

申请人： Guang-Ren Shen ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Guang-Ren Shen ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/786

摘要： A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

摘要翻译： 提供薄膜晶体管（TFT）及其制造方法。 TFT包括沟道层，欧姆接触层，电介质层，源极，漏极，栅极和栅极绝缘层。 沟道层具有上表面和侧壁。 欧姆接触层设置在沟道层的上表面的一部分上。 电介质层设置在沟道层的侧壁上，并且不与欧姆接触层重叠。 源极和漏极设置在欧姆接触层和电介质层的部分上。 电介质层的一部分不被源极或漏极覆盖。 门在通道层的上方或下方。 栅极绝缘层设置在栅极和沟道层之间。

公开(公告)号：US20120241743A1

公开(公告)日：2012-09-27

申请号：US13489458

申请日：2012-06-06

申请人： Guang-Ren Shen ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Guang-Ren Shen ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L29/786

CPC分类号： H01L29/786

摘要： A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

摘要翻译： 提供薄膜晶体管（TFT）及其制造方法。 TFT包括沟道层，欧姆接触层，电介质层，源极，漏极，栅极和栅极绝缘层。 沟道层具有上表面和侧壁。 欧姆接触层设置在沟道层的上表面的一部分上。 电介质层设置在沟道层的侧壁上，并且不与欧姆接触层重叠。 源极和漏极设置在欧姆接触层和电介质层的部分上。 电介质层的一部分不被源极或漏极覆盖。 门在通道层的上方或下方。 栅极绝缘层设置在栅极和沟道层之间。

公开(公告)号：US08232147B2

公开(公告)日：2012-07-31

申请号：US12779955

申请日：2010-05-14

申请人： Guang-Ren Shen ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Guang-Ren Shen ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L29/786

CPC分类号： H01L29/786

摘要： A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

摘要翻译： 提供薄膜晶体管（TFT）及其制造方法。 TFT包括沟道层，欧姆接触层，电介质层，源极，漏极，栅极和栅极绝缘层。 沟道层具有上表面和侧壁。 欧姆接触层设置在沟道层的上表面的一部分上。 电介质层设置在沟道层的侧壁上，并且不与欧姆接触层重叠。 源极和漏极设置在欧姆接触层和电介质层的部分上。 电介质层的一部分不被源极或漏极覆盖。 门在通道层的上方或下方。 栅极绝缘层设置在栅极和沟道层之间。

公开(公告)号：US20100270551A1

公开(公告)日：2010-10-28

申请号：US12500609

申请日：2009-07-10

申请人： Chuan-Sheng Wei ,  Guang-Ren Shen ,  Chang-Yu Huang ,  Pei-Ming Chen ,  Sheng-Chao Liu ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Chuan-Sheng Wei ,  Guang-Ren Shen ,  Chang-Yu Huang ,  Pei-Ming Chen ,  Sheng-Chao Liu ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L33/00 ,  H01L29/786

CPC分类号： H01L29/42384 ,  H01L29/41733 ,  H01L29/66765

摘要： A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other.

摘要翻译： 提供底栅薄膜晶体管和有源阵列基板。 底栅薄膜晶体管包括栅极，栅极绝缘层，半导体层，多个源极和多个漏极。 栅极绝缘层设置在栅极上。 半导体层设置在栅极绝缘层上并位于栅极上方。 半导体层和栅极的面积比约为0.001〜0.9。 源极彼此电连接，并且漏极彼此电连接。