公开(公告)号：US08836314B2

公开(公告)日：2014-09-16

申请号：US13494994

申请日：2012-06-13

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： G05F3/16 ,  G05F3/20 ,  G05F1/56

CPC分类号： G05F1/561

摘要： A reference current source circuit includes a reference voltage generating module, a voltage buffer, an equivalent resistance, a filter capacitor, a current mirror module and a reference current outputting terminal. The voltage buffer includes an operational amplifier and a first FET. The current mirror module includes a second FET and a third FET. The equivalent resistor includes an oscillator, a fourth FET, a fifth FET and a capacitor connected to the fourth FET and the fifth FET. The oscillator is for generating a clock signal whose frequency is related to a charging and discharging capacitor in the oscillator to control charging and discharging of the capacitor in the equivalent resistance. The reference current outputting terminal is for outputting a reference current only related to a capacitance ratio of the capacitor to the charging and discharging capacitor. A reference current source system is further disclosed.

摘要翻译： 参考电流源电路包括参考电压产生模块，电压缓冲器，等效电阻，滤波电容器，电流镜模块和参考电流输出端子。 电压缓冲器包括运算放大器和第一FET。 电流镜模块包括第二FET和第三FET。 等效电阻器包括振荡器，第四FET，第五FET和连接到第四FET和第五FET的电容器。 振荡器用于产生频率与振荡器中的充电和放电电容相关的时钟信号，以控制电容器的等效电阻的充电和放电。 参考电流输出端子用于输出仅与电容器与充电和放电电容器的电容比相关的参考电流。 进一步公开了参考电流源系统。

公开(公告)号：US20120280733A1

公开(公告)日：2012-11-08

申请号：US13454090

申请日：2012-04-24

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： H03K5/04

CPC分类号： H03K5/1565

摘要： An adjusting circuit of duty cycle includes an edge detecting circuit, a flip-flop connected to the edge detecting circuit, a feedback control circuit connected to the flip-flop and a charge pump circuit connected to the feedback control circuit. The edge detecting circuit detects an edge of an inputted clock signal. The flip-flop sets an outputting terminal thereof at a first level according to a clock signal outputted by the edge detecting circuit. The charge pump circuit controls a duration of the first level outputted the outputting terminal of the flip-flop by charging and discharging a capacitor. The flip-flop sets the outputting terminal thereof at a second level contrary to the first level according to a clock signal outputted by the feedback control circuit. An adjusting method of duty cycle is also disclosed. The adjusting circuit of duty cycle has a simple structure, a stable performance and a fast speed.

摘要翻译： 占空比调整电路包括边缘检测电路，连接到边缘检测电路的触发器，连接到触发器的反馈控制电路和连接到反馈控制电路的电荷泵电路。 边缘检测电路检测输入的时钟信号的边沿。 触发器根据由边缘检测电路输出的时钟信号将其输出端设置在第一电平。 电荷泵电路通过对电容器进行充电和放电来控制输出触发器的输出端的第一电平的持续时间。 触发器根据由反馈控制电路输出的时钟信号将其输出端设置为与第一电平相反的第二电平。 还公开了占空比的调整方法。 占空比调整电路结构简单，性能稳定，速度快。

公开(公告)号：US08294442B2

公开(公告)日：2012-10-23

申请号：US12793844

申请日：2010-06-04

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： G05F1/569 ,  H02H3/22

CPC分类号： H03F3/45183 ,  G05F1/575 ,  H03F2203/45648 ,  H03F2203/45674

摘要： A low dropout regulator (LDO) circuit without external capacitors rapidly responding to load change includes a slow pathway and a fast pathway for controlling voltage, wherein the slow pathway for providing precise output voltage includes an operational amplifier I0, a driving transistor MPR, a resistor RF1 and a resistor RF2 forming an operational amplifier loop, and the fast pathway for responding to rapid load change includes a comparator I1, a comparator I2, a field effect transistor MN1, a field effect transistor MN2, a driving transistor MPR, a resistor RF1 and a resistor RF2 forming a comparator loop. The circuit is capable of controlling the output voltage by the slow operational amplifier loop and fast comparator loop, so that the load response speed of the LDO is greatly improved without the increase of the system power consumption and external big capacitors.

摘要翻译： 没有外部电容器对负载变化作出快速响应的低压差稳压器（LDO）电路包括缓慢的通路和用于控制电压的快速通路，其中用于提供精确输出电压的慢通路包括运算放大器I0，驱动晶体管MPR，电阻 RF1和形成运算放大器环路的电阻器RF2，并且用于响应快速负载变化的快速通路包括比较器I1，比较器I2，场效应晶体管MN1，场效应晶体管MN2，驱动晶体管MPR，电阻器RF1 以及形成比较器环路的电阻器RF2。 该电路能够通过慢运算放大器环路和快速比较器环路来控制输出电压，从而在不增加系统功耗和外部大电容器的情况下，极大地提高了LDO的负载响应速度。

公开(公告)号：US20110260897A1

公开(公告)日：2011-10-27

申请号：US13091043

申请日：2011-04-20

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： H03M1/04

CPC分类号： H03K3/84 ,  G06F7/588

摘要： A stochastic signal generation circuit includes a signal output circuit and a signal processing circuit connected with the signal output circuit. The signal output circuit includes two matching semiconductor components, wherein the signal output circuit detects a slight mismatch between the two matching semiconductor components, converts the detected slight mismatch into a corresponding electric signal, amplifies the electric signal, and outputs an analog voltage signal. The signal processing circuit converts the analog voltage signal into a stochastic digital signal. Also, a method for generating a stochastic signal is provided. The present invention decreases the cost of the integrated circuit, and better ensures the information security of the electronic products.

摘要翻译： 随机信号发生电路包括信号输出电路和与信号输出电路连接的信号处理电路。 信号输出电路包括两个匹配的半导体部件，其中信号输出电路检测到两个匹配的半导体部件之间的轻微不匹配，将检测到的轻微失配转换成相应的电信号，放大电信号，并输出模拟电压信号。 信号处理电路将模拟电压信号转换为随机数字信号。 另外，提供了一种用于生成随机信号的方法。 本发明降低了集成电路的成本，更好地保证了电子产品的信息安全。

公开(公告)号：US20130106392A1

公开(公告)日：2013-05-02

申请号：US13494994

申请日：2012-06-13

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： G05F3/02

CPC分类号： G05F1/561

摘要： A reference current source circuit includes a reference voltage generating module, a voltage buffer, an equivalent resistance, a filter capacitor, a current mirror module and a reference current outputting terminal. The voltage buffer includes an operational amplifier and a first FET. The current mirror module includes a second FET and a third FET. The equivalent resistor includes an oscillator, a fourth FET, a fifth FET and a capacitor connected to the fourth FET and the fifth FET. The oscillator is for generating a clock signal whose frequency is related to a charging and discharging capacitor in the oscillator to control charging and discharging of the capacitor in the equivalent resistance. The reference current outputting terminal is for outputting a reference current only related to a capacitance ratio of the capacitor to the charging and discharging capacitor. A reference current source system is further disclosed.

摘要翻译： 参考电流源电路包括参考电压产生模块，电压缓冲器，等效电阻，滤波电容器，电流镜模块和参考电流输出端子。 电压缓冲器包括运算放大器和第一FET。 电流镜模块包括第二FET和第三FET。 等效电阻器包括振荡器，第四FET，第五FET和连接到第四FET和第五FET的电容器。 振荡器用于产生频率与振荡器中的充电和放电电容相关的时钟信号，以控制电容器的等效电阻的充电和放电。 参考电流输出端子用于输出仅与电容器与充电和放电电容器的电容比相关的参考电流。 进一步公开了参考电流源系统。

公开(公告)号：US20110043184A1

公开(公告)日：2011-02-24

申请号：US12831147

申请日：2010-07-06

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： G05F3/16

CPC分类号： G05F3/30

摘要： The present abstract discloses a CMOS bandgap reference source circuit, comprising a startup circuit, a power-off control circuit, a reference voltage generating circuit and an operational amplifier. The positive and a negative input terminal of the operational amplifier both consist of two same field effect transistors and both are provided with an input controlled switch; by doing so, two field effect transistors in the positive terminal and two field effect transistors in the negative terminal work alternately between their strong inversion and cut-off region so as to drastically reduce the noises of the reference circuit, which results originally from the flicker noises of two input transistors of the operational amplifier.

摘要翻译： 本摘要公开了一种CMOS带隙参考源电路，包括启动电路，断电控制电路，参考电压产生电路和运算放大器。 运算放大器的正输入端和负输入端均由两个相同的场效应晶体管组成，两者均设有输入控制开关; 通过这样做，正极端子中的两个场效应晶体管和负极端子中的两个场效应晶体管交替地在它们的强反转和截止区域之间工作，从而大大降低了参考电路的噪声，这最初来自闪烁 运算放大器的两个输入晶体管的噪声。

公开(公告)号：US08519762B2

公开(公告)日：2013-08-27

申请号：US13454090

申请日：2012-04-24

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： H03K3/017

CPC分类号： H03K5/1565

摘要： An adjusting circuit of duty cycle includes an edge detecting circuit, a flip-flop connected to the edge detecting circuit, a feedback control circuit connected to the flip-flop and a charge pump circuit connected to the feedback control circuit. The edge detecting circuit detects an edge of an inputted clock signal. The flip-flop sets an outputting terminal thereof at a first level according to a clock signal outputted by the edge detecting circuit. The charge pump circuit controls a duration of the first level outputted the outputting terminal of the flip-flop by charging and discharging a capacitor. The flip-flop sets the outputting terminal thereof at a second level contrary to the first level according to a clock signal outputted by the feedback control circuit. An adjusting method of duty cycle is also disclosed. The adjusting circuit of duty cycle has a simple structure, a stable performance and a fast speed.

摘要翻译： 占空比调整电路包括边缘检测电路，连接到边缘检测电路的触发器，连接到触发器的反馈控制电路和连接到反馈控制电路的电荷泵电路。 边缘检测电路检测输入的时钟信号的边沿。 触发器根据由边缘检测电路输出的时钟信号将其输出端设置在第一电平。 电荷泵电路通过对电容器进行充电和放电来控制输出触发器的输出端的第一电平的持续时间。 触发器根据由反馈控制电路输出的时钟信号将其输出端设置为与第一电平相反的第二电平。 还公开了占空比的调整方法。 占空比调整电路结构简单，性能稳定，速度快。

公开(公告)号：US20130106506A1

公开(公告)日：2013-05-02

申请号：US13494991

申请日：2012-06-13

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： H03G3/20

CPC分类号： H03G1/04 ,  H03G3/3005

摘要： An adjustable gain audio power amplifying circuit includes an input unit, an audio amplifying unit connected to the input unit, a gain adjusting unit connected to the audio amplifying unit, a controlling unit connected to the gain adjusting unit, a comparing unit connected between the gain adjusting unit and the controlling unit and an output unit connected to the audio amplifying unit. The comparing unit compares an outputted signal of the output unit with a common-mode reference voltage, outputs a gain adjustment controlling signal and sends the gain adjustment controlling signal into the controlling unit. When the outputted signal equals the common-mode reference voltage, the gain adjustment controlling signal turns over and then the controlling unit detects the turnover and sends a received gain adjustment signal into the gain adjusting unit. Based on the received gain adjustment signal, the gain adjusting unit controls gains of the adjustable gain audio power amplifying circuit.

摘要翻译： 可调增益音频功率放大电路包括输入单元，连接到输入单元的音频放大单元，连接到音频放大单元的增益调节单元，连接到增益调整单元的控制单元，连接在增益之间的比较单元 调节单元和控制单元以及连接到音频放大单元的输出单元。 比较单元将输出单元的输出信号与共模参考电压进行比较，输出增益调整控制信号，并将增益调整控制信号发送到控制单元。 当输出信号等于共模参考电压时，增益调整控制信号转过来，然后控制单元检测到周转量，并将接收到的增益调整信号发送到增益调整单元。 基于所接收的增益调整信号，增益调整单元控制可调节增益音频功率放大电路的增益。

公开(公告)号：US08384569B2

公开(公告)日：2013-02-26

申请号：US13091043

申请日：2011-04-20

申请人： Guojun Zhu

发明人： Guojun Zhu

IPC分类号： H03M1/04

CPC分类号： H03K3/84 ,  G06F7/588

摘要： A stochastic signal generation circuit includes a signal output circuit and a signal processing circuit connected with the signal output circuit. The signal output circuit includes two matching semiconductor components, wherein the signal output circuit detects a slight mismatch between the two matching semiconductor components, converts the detected slight mismatch into a corresponding electric signal, amplifies the electric signal, and outputs an analog voltage signal. The signal processing circuit converts the analog voltage signal into a stochastic digital signal. Also, a method for generating a stochastic signal is provided. The present invention decreases the cost of the integrated circuit, and better ensures the information security of the electronic products.

摘要翻译： 随机信号发生电路包括信号输出电路和与信号输出电路连接的信号处理电路。 信号输出电路包括两个匹配的半导体部件，其中信号输出电路检测到两个匹配的半导体部件之间的轻微不匹配，将检测到的轻微失配转换成相应的电信号，放大电信号，并输出模拟电压信号。 信号处理电路将模拟电压信号转换为随机数字信号。 另外，提供了一种用于生成随机信号的方法。 本发明降低了集成电路的成本，更好地保证了电子产品的信息安全。

公开(公告)号：US20100104028A1

公开(公告)日：2010-04-29

申请号：US12500603

申请日：2009-07-10

申请人： Fei Ye ,  Xiangyang Guo ,  Guojun Zhu

发明人： Fei Ye ,  Xiangyang Guo ,  Guojun Zhu

IPC分类号： H04B3/00

CPC分类号： H04L25/0286 ,  H04L25/0272

摘要： The present invention provides a current segmentation circuit for optimizing output waveform from high speed data transmission interface, which comprises a four current sources controlled by four switches to segment current so as to control the rising and falling time of the high speed transmission data, and to match the delay of the current control signal and the delay of the data, wherein the four current sources are I1, I2, I3 and I4, and the current control switches are K1, K2, K3 and K4, wherein I1+I2=I3+I4, wherein the switches K1 and K3 control the current I1/I3 to flow into DP/DM line, and the switches K2 and K4 control the current I2/I4 to flow into DP/DM line. The present invention can depress overshoot and eliminate turning point in the waveform.

摘要翻译： 本发明提供一种用于优化来自高速数据传输接口的输出波形的当前分割电路，其包括由四个开关控制的四个电流源来分段电流，以便控制高速传输数据的上升和下降时间，并且 匹配电流控制信号的延迟和数据的延迟，其中四个电流源为I1，I2，I3和I4，电流控制开关为K1，K2，K3和K4，其中I1 + I2 = I3 + I4，其中开关K1和K3控制电流I1 / I3流入DP / DM线，开关K2和K4控制电流I2 / I4流入DP / DM线。 本发明可以抑制过冲，消除波形中的转折点。