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公开(公告)号：US08493863B2
公开(公告)日：2013-07-23
申请号：US13008184
申请日：2011-01-18
申请人： Gurjeet S. Saund , James B. Keller , Michael Frank
发明人： Gurjeet S. Saund , James B. Keller , Michael Frank
IPC分类号： H04L12/26
CPC分类号： H04L49/503 , H04L49/205
摘要： In an embodiment, one or more fabric control circuits may be inserted in a communication fabric to control various aspects of the communications by components in the system. The fabric control circuits may be included on the interface of the components to the communication fabric, in some embodiments. In other embodiments that include a hierarchical communication fabric, fabric control circuits may alternatively or additionally be included. The fabric control circuits may be programmable, and thus may provide the ability to tune the communication fabric to meet performance and/or functionality goals.
摘要翻译： 在一个实施例中，可以将一个或多个结构控制电路插入到通信结构中，以通过系统中的组件来控制通信的各个方面。 在一些实施例中，结构控制电路可以包括在组件的接口上到通信结构。 在包括分层通信结构的其他实施例中，结构控制电路可以可选地或另外包括。 织物控制电路可以是可编程的，因此可以提供调谐通信结构以满足性能和/或功能目标的能力。
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公开(公告)号：US08744602B2
公开(公告)日：2014-06-03
申请号：US13008171
申请日：2011-01-18
申请人： Gurjeet S. Saund , James B. Keller , Michael Frank
发明人： Gurjeet S. Saund , James B. Keller , Michael Frank
CPC分类号： H04L49/10
摘要： One or more fabric control circuits may be inserted in a communication fabric to control various aspects of the communications by components in the system. The fabric control circuits may be included on the interface of the components to the communication fabric, for example. Some systems that include a hierarchical communication fabric may also include fabric control circuits that may alternatively or additionally be included. The fabric control circuits may be programmable, and thus may provide the ability to tune the communication fabric to meet performance and/or functionality goals.
摘要翻译： 可以将一个或多个结构控制电路插入到通信结构中，以通过系统中的组件来控制通信的各个方面。 例如，结构控制电路可以包括在组件的接口到通信结构。 包括分级通信结构的一些系统还可以包括可以可选地或另外包括的结构控制电路。 织物控制电路可以是可编程的，因此可以提供调谐通信结构以满足性能和/或功能目标的能力。
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公开(公告)号：US20120185062A1
公开(公告)日：2012-07-19
申请号：US13008171
申请日：2011-01-18
申请人： Gurjeet S. Saund , James B. Keller , Michael Frank
发明人： Gurjeet S. Saund , James B. Keller , Michael Frank
IPC分类号： G05B15/00
CPC分类号： H04L49/10
摘要： In an embodiment, one or more fabric control circuits may be inserted in a communication fabric to control various aspects of the communications by components in the system. The fabric control circuits may be included on the interface of the components to the communication fabric, in some embodiments. In other embodiments that include a hierarchical communication fabric, fabric control circuits may alternatively or additionally be included. The fabric control circuits may be programmable, and thus may provide the ability to tune the communication fabric to meet performance and/or functionality goals.
摘要翻译： 在一个实施例中，可以将一个或多个结构控制电路插入到通信结构中，以通过系统中的组件来控制通信的各个方面。 在一些实施例中，结构控制电路可以包括在组件的接口上到通信结构。 在包括分层通信结构的其他实施例中，结构控制电路可以可选地或另外包括。 织物控制电路可以是可编程的，因此可以提供调谐通信结构以满足性能和/或功能目标的能力。
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公开(公告)号：US20120182902A1
公开(公告)日：2012-07-19
申请号：US13008184
申请日：2011-01-18
申请人： Gurjeet S. Saund , James B. Keller , Michael Frank
发明人： Gurjeet S. Saund , James B. Keller , Michael Frank
IPC分类号： H04L12/28
CPC分类号： H04L49/503 , H04L49/205
摘要： In an embodiment, one or more fabric control circuits may be inserted in a communication fabric to control various aspects of the communications by components in the system. The fabric control circuits may be included on the interface of the components to the communication fabric, in some embodiments. In other embodiments that include a hierarchical communication fabric, fabric control circuits may alternatively or additionally be included. The fabric control circuits may be programmable, and thus may provide the ability to tune the communication fabric to meet performance and/or functionality goals.
摘要翻译： 在一个实施例中，可以将一个或多个结构控制电路插入到通信结构中，以通过系统中的组件来控制通信的各个方面。 在一些实施例中，结构控制电路可以包括在组件的接口上到通信结构。 在包括分层通信结构的其他实施例中，结构控制电路可以可选地或另外包括。 织物控制电路可以是可编程的，因此可以提供调谐通信结构以满足性能和/或功能目标的能力。
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公开(公告)号：US20140086070A1
公开(公告)日：2014-03-27
申请号：US13625416
申请日：2012-09-24
申请人： Gurjeet S. Saund , James B. Keller , Manu Gulati , Sukalpa Biswas
发明人： Gurjeet S. Saund , James B. Keller , Manu Gulati , Sukalpa Biswas
IPC分类号： H04L12/26
CPC分类号： G06F13/1605 , Y02D10/14
摘要： In some embodiments, a system includes a shared, high bandwidth resource (e.g. a memory system), multiple agents configured to communicate with the shared resource, and a communication fabric coupling the multiple agents to the shared resource. The communication fabric may be equipped with limiters configured to limit bandwidth from the various agents based on one or more performance metrics measured with respect to the shared, high bandwidth resource. For example, the performance metrics may include one or more of latency, number of outstanding transactions, resource utilization, etc. The limiters may dynamically modify their limit configurations based on the performance metrics. In an embodiment, the system may include multiple thresholds for the performance metrics, and exceeding a given threshold may include modifying the limiters in the communication fabric. There may be hysteresis implemented in the system as well in some embodiments, to reduce the frequency of transitions between configurations.
摘要翻译： 在一些实施例中，系统包括共享的高带宽资源（例如，存储器系统），被配置为与共享资源通信的多个代理以及将多个代理耦合到共享资源的通信结构。 通信结构可以配备有限制器，其被配置为基于针对共享的高带宽资源测量的一个或多个性能度量来限制来自各种代理的带宽。 例如，性能度量可以包括延迟，未决事务数量，资源利用等中的一个或多个。限制器可以基于性能度量动态修改其限制配置。 在一个实施例中，系统可以包括用于性能度量的多个阈值，并且超过给定阈值可以包括修改通信结构中的限制器。 在一些实施例中，也可能在系统中实现滞后，以减少配置之间的转换频率。
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公开(公告)号：US08848577B2
公开(公告)日：2014-09-30
申请号：US13625416
申请日：2012-09-24
申请人： Gurjeet S. Saund , James B. Keller , Manu Gulati , Sukalpa Biswas
发明人： Gurjeet S. Saund , James B. Keller , Manu Gulati , Sukalpa Biswas
IPC分类号： H04L12/28
CPC分类号： G06F13/1605 , Y02D10/14
摘要： In some embodiments, a system includes a shared, high bandwidth resource (e.g. a memory system), multiple agents configured to communicate with the shared resource, and a communication fabric coupling the multiple agents to the shared resource. The communication fabric may be equipped with limiters configured to limit bandwidth from the various agents based on one or more performance metrics measured with respect to the shared, high bandwidth resource. For example, the performance metrics may include one or more of latency, number of outstanding transactions, resource utilization, etc. The limiters may dynamically modify their limit configurations based on the performance metrics. In an embodiment, the system may include multiple thresholds for the performance metrics, and exceeding a given threshold may include modifying the limiters in the communication fabric. There may be hysteresis implemented in the system as well in some embodiments, to reduce the frequency of transitions between configurations.
摘要翻译： 在一些实施例中，系统包括共享的高带宽资源（例如，存储器系统），被配置为与共享资源通信的多个代理以及将多个代理耦合到共享资源的通信结构。 通信结构可以配备有限制器，其被配置为基于针对共享的高带宽资源测量的一个或多个性能度量来限制来自各种代理的带宽。 例如，性能度量可以包括延迟，未决事务数量，资源利用等中的一个或多个。限制器可以基于性能度量动态修改其限制配置。 在一个实施例中，系统可以包括用于性能度量的多个阈值，并且超过给定阈值可以包括修改通信结构中的限制器。 在一些实施例中，也可能在系统中实现滞后，以减少配置之间的转换频率。
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公开(公告)号：US20130290681A1
公开(公告)日：2013-10-31
申请号：US13460178
申请日：2012-04-30
申请人： James B. Keller , John H. Mylius , Conrado Blasco-Allue , Gerard R. Williams, III , Sandeep Gupta
发明人： James B. Keller , John H. Mylius , Conrado Blasco-Allue , Gerard R. Williams, III , Sandeep Gupta
IPC分类号： G06F9/30
CPC分类号： G06F9/30141 , G06F1/3234 , G06F9/30112 , G06F9/384
摘要： A system and method for efficiently reducing the power consumption of register file accesses. A processor is operable to execute instructions with two or more data types, each with an associated size and alignment. Data operands for a first data type use operand sizes equal to an entire width of a physical register within a physical register file. Data operands for a second data type use operand sizes less than an entire width of a physical register. Accesses of the physical register file for operands associated with a non-full-width data type do not access a full width of the physical registers. A given numerical value may be bypassed for the portion of the physical register that is not accessed.
摘要翻译： 一种有效降低寄存器文件访问功耗的系统和方法。 处理器可操作以执行具有两个或多个数据类型的指令，每个数据类型具有相关联的大小和对齐。 第一种数据类型的数据操作数使用等于物理寄存器文件中物理寄存器的整个宽度的操作数大小。 第二种数据类型的数据操作数使用小于物理寄存器整个宽度的操作数大小。 访问与非全宽数据类型相关的操作数的物理寄存器文件不能访问物理寄存器的全部宽度。 对于未访问的物理寄存器的部分，可以忽略给定的数值。
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公开(公告)号：US08566526B2
公开(公告)日：2013-10-22
申请号：US13545526
申请日：2012-07-10
申请人： James Wang , Zongjian Chen , James B. Keller , Timothy J. Millet
发明人： James Wang , Zongjian Chen , James B. Keller , Timothy J. Millet
IPC分类号： G06F13/00
CPC分类号： G06F3/0631 , G06F3/0604 , G06F3/0638 , G06F3/0673 , G06F12/0802 , G06F12/0831 , G06F12/0848 , G06F12/0853 , G06F12/0864 , G06F12/0877 , G06F12/125 , G06F2212/1021 , G06F2212/2515 , G06F2212/282 , G06F2212/601 , G06F2212/62 , Y02D10/13
摘要： In one embodiment, a memory that is delineated into transparent and non-transparent portions. The transparent portion may be controlled by a control unit coupled to the memory, along with a corresponding tag memory. The non-transparent portion may be software controlled by directly accessing the non-transparent portion via an input address. In an embodiment, the memory may include a decoder configured to decode the address and select a location in either the transparent or non-transparent portion. Each request may include a non-transparent attribute identifying the request as either transparent or non-transparent. In an embodiment, the size of the transparent portion may be programmable. Based on the non-transparent attribute indicating transparent, the decoder may selectively mask bits of the address based on the size to ensure that the decoder only selects a location in the transparent portion.
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公开(公告)号：US20130275720A1
公开(公告)日：2013-10-17
申请号：US13447651
申请日：2012-04-16
申请人： James B. Keller , John H. Mylius , Conrado Blasco-Allue , Gerard R. Williams, III , Suparn Vats
发明人： James B. Keller , John H. Mylius , Conrado Blasco-Allue , Gerard R. Williams, III , Suparn Vats
CPC分类号： G06F9/30032 , G06F9/384
摘要： A system and method for reducing the latency of data move operations. A register rename unit within a processor determines whether a decoded move instruction is eligible for a zero cycle move operation. If so, control logic assigns a physical register identifier associated with a source operand of the move instruction to the destination operand of the move instruction. Additionally, the register rename unit marks the given move instruction to prevent it from proceeding in the processor pipeline. Further maintenance of the particular physical register identifier may be done by the register rename unit during commit of the given move instruction.
摘要翻译： 一种用于减少数据移动操作的延迟的系统和方法。 处理器内的寄存器重命名单元确定解码的移动指令是否符合零周期移动操作的资格。 如果是这样，则控制逻辑将与移动指令的源操作数相关联的物理寄存器标识分配给移动指令的目的地操作数。 此外，寄存器重命名单元标记给定的移动指令以防止其在处理器管线中继续进行。 特定物理寄存器标识符的进一步维护可以在给定移动指令的提交期间由寄存器重命名单元完成。
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公开(公告)号：US07991928B2
公开(公告)日：2011-08-02
申请号：US12408410
申请日：2009-03-20
IPC分类号： G06F3/00 , G06F15/167
CPC分类号： G06F12/0831 , G06F13/362 , G06F13/4213 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： An interface unit may comprise a buffer configured to store requests that are to be transmitted on an interconnect and a control unit coupled to the buffer. In one embodiment, the control unit is coupled to receive a retry response from the interconnect during a response phase of a first transaction for a first request stored in the buffer. The control unit is configured to record an identifier supplied on the interconnect with the retry response that identifies a second transaction that is in progress on the interconnect. The control unit is configured to inhibit reinitiation of the first transaction at least until detecting a second transmission of the identifier. In another embodiment, the control unit is configured to assert a retry response during a response phase of a first transaction responsive to a snoop hit of the first transaction on a first request stored in the buffer for which a second transaction is in progress on the interconnect. The control unit is further configured to provide an identifier of the second transaction with the retry response.
摘要翻译： 接口单元可以包括被配置为存储要在互连上发送的请求的缓冲器和耦合到缓冲器的控制单元。 在一个实施例中，控制单元被耦合以在对于存储在缓冲器中的第一请求的第一事务的响应阶段期间从互连接收重试响应。 控制单元被配置为记录在互连上提供的标识符，该重试响应标识互连上正在进行的第二事务。 控制单元被配置为至少在检测到标识符的第二次传输之前禁止第一事务的重新发起。 在另一个实施例中，控制单元被配置为在第一事务的响应阶段响应第一事务的窥探命中在存储在第二事务在互连上的第二事务的缓冲器中的第一请求时断言重试响应 。 控制单元还被配置为提供具有重试响应的第二事务的标识符。
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