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公开(公告)号:US20240064109A1
公开(公告)日:2024-02-22
申请号:US18492517
申请日:2023-10-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Daniel William Dauwe , Ryan Dean Menhusen , Darel Neal Emmot
IPC: H04L47/722 , H04L47/12 , H04L43/0852 , H04L43/50 , H04L43/0823
CPC classification number: H04L47/722 , H04L47/12 , H04L43/0852 , H04L43/50 , H04L43/0823
Abstract: A system for facilitating sender-side congestion control is provided. During operation, the system, on a sender node, can determine the utilization of a buffer at a last-hop switch to a receiver node based on in-flight packets to the receiver node. The receiver node can be reachable from the sender node via the last-hop switch. The system can then determining a fraction of available space in the buffer for packets from the sender node based on the utilization of the buffer. Subsequently, the system can determine whether the fraction of the available space in the buffer can accommodate a next packet from the sender node while avoiding congestion at the buffer at the receiver node. If the fraction of the available space in the buffer can accommodate the next packet, the system can allow the sender node to send the next packet to the receiver node.
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公开(公告)号:US10929322B2
公开(公告)日:2021-02-23
申请号:US16147404
申请日:2018-09-28
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Nicholas George McDonald , Darel Neal Emmot
IPC: G06F13/364 , G06F13/22 , G06F13/366
Abstract: An arbiter may include a plurality of cells, mapping logic, a fixed priority arbiter, and unmapping logic. Each cell may be associated with a corresponding client and configured to store a priority for the corresponding client. The mapping logic may be connected to the plurality of cells to order requests received from the clients according to the priorities stored in the cells. The fixed priority arbiter may receive the ordered requests and generate a grant for a winning request of the requests. The unmapping logic may use the stored priorities to yield the grant back to the winning client that sent the winning request.
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公开(公告)号:US20200014635A1
公开(公告)日:2020-01-09
申请号:US16029442
申请日:2018-07-06
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Nicholas George McDonald , Darel Neal Emmot
IPC: H04L12/933 , H04L5/00 , H04L12/911
Abstract: Examples relate to switching devices comprising a switch controller and a plurality of interconnected sub-switches forming an internal network of the switching device. A packet is received at a first sub-switch of the plurality of interconnected sub-switches. The packet is to be routed to a particular external output port of a second sub-switch of the plurality of interconnected sub-switches. Upon reception of the packet, the switch controller reserves a space for the packet in a queue associated to the particular external output port. Then, the switch controller routes the packet on the internal network to the particular external output to occupy the reserved space for the packet.
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公开(公告)号:US11924106B2
公开(公告)日:2024-03-05
申请号:US17410492
申请日:2021-08-24
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Ryan Dean Menhusen , Darel Neal Emmot , Daniel William Dauwe
IPC: H04L47/122 , H04L47/17 , H04L47/30 , H04L47/35
CPC classification number: H04L47/122 , H04L47/17 , H04L47/30 , H04L47/35
Abstract: A system for facilitating sender-side granular congestion control is provided. During operation, the first and second processes of an application can run on sender and receiver nodes, respectively. A first buffer on the sender node can be allocated to the first process. For the first process, the system can then identify a second buffer at a last-hop switch of the receiver node. The system can determine, based on in-flight packets, the utilization of the second buffer. The system can also determine a fraction of available space in the second buffer for packets from the first buffer based on the utilization. Subsequently, the system can determine whether the fraction of the available space can accommodate the next packet from the first buffer. If the fraction of the available space can accommodate the next packet, the system can allow the first process to send the next packet to the second process.
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公开(公告)号:US20230185721A1
公开(公告)日:2023-06-15
申请号:US17644352
申请日:2021-12-15
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Ryan D. Menhusen , Darel Neal Emmot
IPC: G06F12/0846
CPC classification number: G06F12/0848 , G06F2212/608
Abstract: In some examples, a system includes a processing entity and a memory to store data arranged in a plurality of bins associated with respective key values of a key. The system includes a cache to store cached data elements for respective accumulators that are updatable to represent occurrences of the respective key values of the key, where each accumulator corresponds to a different bin of the plurality of bins, and each cached data element has a range that is less than a range of a corresponding bin of the plurality of bins. Responsive to a value of a given cached data element as updated by a given accumulator satisfying a criterion, the processing entity is to cause an aggregation of the value of the given cached data element with a bin value in a respective bin.
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公开(公告)号:US20220138128A1
公开(公告)日:2022-05-05
申请号:US17514720
申请日:2021-10-29
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Gregg B. Lesartre , Darel Neal Emmot
Abstract: A method comprises receiving a message comprising an identifier for an address template, using the identifier to select the address template from a set of address templates, determining a set of memory addresses for a corresponding set of memory operations using the address template, and executing the memory operations.
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公开(公告)号:US10757038B2
公开(公告)日:2020-08-25
申请号:US16029442
申请日:2018-07-06
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Nicholas George McDonald , Darel Neal Emmot
IPC: H04L12/933 , H04L12/911 , H04L5/00
Abstract: Examples relate to switching devices comprising a switch controller and a plurality of interconnected sub-switches forming an internal network of the switching device. A packet is received at a first sub-switch of the plurality of interconnected sub-switches. The packet is to be routed to a particular external output port of a second sub-switch of the plurality of interconnected sub-switches. Upon reception of the packet, the switch controller reserves a space for the packet in a queue associated to the particular external output port. Then, the switch controller routes the packet on the internal network to the particular external output to occupy the reserved space for the packet.
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公开(公告)号:US20200106718A1
公开(公告)日:2020-04-02
申请号:US16146605
申请日:2018-09-28
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Gregg B. Lesartre , Norell Estella Menhusen , Darel Neal Emmot , David P. Hannum
IPC: H04L12/937 , H04L12/875 , H04L12/865 , H04L12/863 , H04L12/867 , H04L12/801
Abstract: A system, includes a plurality of sub-queues. Each sub-queue is assigned to an age class of a sequence of age classes. A set of age thresholds divides the sub-queues. A queue manager places a received transaction into a sub-queue based on a comparison of an age of the received transaction to the set of age thresholds.
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公开(公告)号:US20240232284A9
公开(公告)日:2024-07-11
申请号:US17971486
申请日:2022-10-21
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: DANIEL DAUWE , Avinash Kethineedi , Darel Neal Emmot , Ponnamanda Bhaskar Sampath Sai Sriram
IPC: G06F17/16
CPC classification number: G06F17/16
Abstract: Systems and methods implement a column-partition sparse matrix (CPSM) format that provides enhanced/efficient matrix operations, e.g., sparse matrix vector multiplication (SpMV). The CPSM format is an enhanced layout, the data being arranged by column-partitioning the sparse matrix, and partitioning the dense matrix in a manner that improves scalability, computational efficiency, and leverages distributed computing architecture in performing SpMV operations. For example, data can be arranged by partitioning, by column, one or more contiguous columns of a sparse matrix of data into a plurality of column partitions, where the sparse matrix is associated with a sparse matrix multiplication operation. A plurality of column partition groups is formed. Each of the plurality of column partition groups are then distributed to a respective processor from a plurality of processors such that a portion of the sparse matrix multiplication operation is independently performed by each processor of the plurality of processors.
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公开(公告)号:US20230061885A1
公开(公告)日:2023-03-02
申请号:US17410422
申请日:2021-08-24
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Daniel William Dauwe , Ryan Dean Menhusen , Darel Neal Emmot
IPC: H04L12/925 , H04L12/801 , H04L12/26
Abstract: A system for facilitating sender-side congestion control is provided. During operation, the system, on a sender node, can determine the utilization of a buffer at a last-hop switch to a receiver node based on in-flight packets to the receiver node. The receiver node can be reachable from the sender node via the last-hop switch. The system can then determining a fraction of available space in the buffer for packets from the sender node based on the utilization of the buffer. Subsequently, the system can determine whether the fraction of the available space in the buffer can accommodate a next packet from the sender node while avoiding congestion at the buffer at the receiver node. If the fraction of the available space in the buffer can accommodate the next packet, the system can allow the sender node to send the next packet to the receiver node.
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