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    Circuits with delay tap lines
    1.
    发明授权
    Circuits with delay tap lines 有权

    公开(公告)号：US10031353B2

    公开(公告)日：2018-07-24

    申请号：US15272856

    申请日：2016-09-22

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Tsung-Ching Huang ,  Chin-Hui Chen ,  Marco Fiorentino ,  Raymond G. Beausoleil

    IPC: H03K3/00 ,  G02F1/01 ,  H03K5/06 ,  G02F1/025 ,  H03K5/00 ,  H04B10/69

    Abstract: Examples described herein relate to a driver circuit. In an example, the circuit includes a first input for receiving a first signal and a second input for receiving a second signal that is an inverse of the first signal. The circuit also includes a first driver array electrically coupling the first input to a first DC isolator and a first delay tap line electrically coupling the second input to the first DC isolator. The circuit further includes a second driver array electrically coupling the second input to a second DC isolator and a second delay tap line electrically coupling the first input to the second DC isolator. A carrier controller of the circuit is electrically coupled between the first DC isolator and the second DC isolator.

    VASCULAR PATTERN DETECTION SYSTEMS
    3.
    发明申请
    VASCULAR PATTERN DETECTION SYSTEMS 审中-公开

    公开(公告)号：US20190005301A1

    公开(公告)日：2019-01-03

    申请号：US16109716

    申请日：2018-08-22

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Chin-Hui Chen ,  Tsung-Ching Huang ,  Zhihong Huang ,  Raymond G. Beausoleil

    IPC: G06K9/00

    Abstract: In the examples provided herein, a vascular pattern recognition system integrated onto a portable card includes a vascular pattern detection system to obtain image data of blood vessels of a finger to be swiped across a detection area on the portable card, wherein the vascular pattern detection system includes a near infrared light source and an image sensor array. The vascular pattern recognition system also includes an image processor to process the image data to generate a scanned vascular pattern and compare the scanned vascular pattern to a pre-stored pattern stored on the portable card to authenticate the image data, and a security processor to generate a transaction code to authorize a transaction upon authentication of the image data.

    VASCULAR PATTERN DETECTION SYSTEMS
    5.
    发明申请
    VASCULAR PATTERN DETECTION SYSTEMS 审中-公开

    公开(公告)号：US20170357843A1

    公开(公告)日：2017-12-14

    申请号：US15179156

    申请日：2016-06-10

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Chin-Hui Chen ,  Tsung-Ching Huang ,  Zhihong Huang ,  Raymond G Beausoleil

    IPC: G06K9/00

    CPC classification number: G06K9/00087 ,  G06K9/00013 ,  G06K9/00114 ,  G06K9/00885

    Abstract: In the examples provided herein, a vascular pattern recognition system integrated onto a portable card includes a vascular pattern detection system to obtain image data of blood vessels of a finger to be swiped across a detection area on the portable card, wherein the vascular pattern detection system includes a near infrared light source and an image sensor array. The vascular pattern recognition system also includes an image processor to process the image data to generate a scanned vascular pattern and compare the scanned vascular pattern to a pre-stored pattern stored on the portable card to authenticate the image data, and a security processor to generate a transaction code to authorize a transaction upon authentication of the image data.

    OPTICAL SIGNAL MODULATION
    6.
    发明申请
    OPTICAL SIGNAL MODULATION 审中-公开

    公开(公告)号：US20190020416A1

    公开(公告)日：2019-01-17

    申请号：US16068713

    申请日：2016-01-15

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Tsung-Ching Huang ,  Ashkan Seyedi ,  Chin-Hui Chen ,  Cheng Li ,  Marco Fiorentino ,  Raymond G. Beausoleil

    IPC: H04B10/516 ,  H04J14/02

    Abstract: An example system includes an optical modulator and a multiplexing controller. The modulator includes a data bus for receiving at least one data signal, a plurality of multiplexers and a plurality of modulating segments. Each multiplexer is coupled to the data bus to receive at least one data signal and to output a multiplexed signal. Each modulating segment may receive the multiplexed signal from one of the plurality of multiplexers and modulate the multiplexed signal using an optical input. The multiplexing controller may be in communication with the plurality of multiplexers and may configure each of the plurality of multiplexers in accordance with a selected modulation type.

    CMOS-PHOTONICS CO-DESIGN
    7.
    发明申请
    CMOS-PHOTONICS CO-DESIGN 审中-公开

    公开(公告)号：US20190018919A1

    公开(公告)日：2019-01-17

    申请号：US16065716

    申请日：2016-01-22

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Tsung-Ching Huang ,  Chin-Hui Chen ,  Aarco Fiorentino ,  Raymond G. Beausoleil

    IPC: G06F17/50

    Abstract: In example implementations, a method executed by a processor is provided. The method receives a simulated photonic data input based on a theoretical photonic design that meets a target specification. A complementary metal-oxide semiconductor (CMOS) circuit design is designed based on the simulated photonic data input using a pre-layout simulation. An experimental photonic data input based on a fabricated photonics device that meets the target specification is received. The CMOS circuit is designed based on the experimental photonic data input using a post-layout simulation. A physical circuit CMOS circuit design and a layout that includes detailed physical dimensions associated with the physical CMOS circuit design that is based on the pre-layout and the post-layout are transmitted to a CMOS foundry.

    Startup circuit to initialize voltage reference circuit
    9.
    发明授权
    Startup circuit to initialize voltage reference circuit 有权

    公开(公告)号：US10401887B2

    公开(公告)日：2019-09-03

    申请号：US15745993

    申请日：2015-07-22

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Tsung-Ching Huang ,  Chin-Hui Chen ,  Cheng Li

    IPC: G05F1/565 ,  H02M1/36

    Abstract: A circuit includes a startup circuit to provide a charging signal to initiate startup of a reference circuit. The startup circuit includes a detector circuit having a detector current path control, a level shifter having a level shifter current path control, and a charger circuit having a charger current path control. Each of the detector current path control, the level shifter current path control, and the charger circuit current path control enable current flow in the startup circuit when the charger turn-on signal is in the on-state and disable the current flow in the startup circuit when the charger turn-on signal is in the off state.

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