公开(公告)号：US20150004824A1

公开(公告)日：2015-01-01

申请号：US13931286

申请日：2013-06-28

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Vincent Nguyen ,  Binh Nguyen ,  Melvin K. Benedict ,  Minh H. Nguyen

IPC: H01R13/629 ,  G01R31/04

CPC classification number: G01R31/041 ,  H01R12/7029 ,  H01R13/641

Abstract: The present disclosure describes, in one example, a dual inline memory module socket. The dual inline memory module socket includes a base to receive a memory module. The base further comprises a first detection pin and a second detection pin. A latch may be coupled to the base and is to electrically couple the first detection pin to the second detection pin in a dosed position to enable a determination that the memory module is properly seated.

Abstract translation: 本公开在一个示例中描述了双列直插存储器模块插座。 双列直插式内存模块插座包括一个接收内存模块的基座。 基座还包括第一检测引脚和第二检测引脚。 闩锁可以联接到基座并且将电子耦合到处于计量位置的第一检测销到第二检测销，以使得可以确定存储器模块正确就位。

公开(公告)号：US20150261672A1

公开(公告)日：2015-09-17

申请号：US14435167

申请日：2013-01-30

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Vincent Nguyen ,  Binh Nguyen ,  William C. Hallowell ,  Raghavan V. Venugopal

IPC: G06F12/08 ,  G06F3/06

CPC classification number: G06F12/0804 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0685 ,  G06F2003/0691 ,  G06F2212/1032 ,  G06F2212/202 ,  G11C14/0018

Abstract: During runtime of a system, a memory controller is caused to relinquish control of a memory module that includes a volatile memory and a non-volatile memory. After the triggering, an indication is activated to the memory module, the indication causing a backup operation in the memory module, the backup operation being controlled by an internal controller in the memory module, and the backup operation involving a transfer of data from the volatile memory to the non-volatile memory in the memory module.

Abstract translation: 在系统的运行期间，使存储器控制器放弃对包含易失性存储器和非易失性存储器的存储器模块的控制。 触发后，指示被激活到存储器模块，指示引起存储器模块中的备份操作，备份操作由存储器模块中的内部控制器控制，并且备份操作涉及从易失性的数据传输 内存到内存模块中的非易失性存储器。

公开(公告)号：US09836104B2

公开(公告)日：2017-12-05

申请号：US14763582

申请日：2013-01-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Brian T Purcell ,  Barry S Basile ,  Binh Nguyen

IPC: G06F11/00 ,  G06F1/26 ,  G06F1/24 ,  G06F1/12 ,  G06F11/22 ,  G06F11/30

CPC classification number: G06F1/26 ,  G06F1/12 ,  G06F1/24 ,  G06F11/221 ,  G06F11/2221 ,  G06F11/3027

Abstract: Embodiments provide apparatuses and systems in which slave power sequencers share a command bus and power sequence respective power groups through power sequence states of a power sequencing protocol in response to commands on the command bus. In some examples, a system may include a master power sequencer to output onto a command bus a command to perform a power sequencing protocol for transitioning the system from a first power state to a second power state, and a plurality of slave power sequencers sharing the command bus, each slave power sequencer to power sequence a respective power group to a next power sequence state in response to the command. Other examples are described and claimed.