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公开(公告)号:US20210402783A1
公开(公告)日:2021-12-30
申请号:US16763450
申请日:2019-12-03
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: Anthony D. STUDER , Quinton B. WEAVER , David N. N. OLSEN , James Michael GARDNER , Jim RING , David Owen ROETHIG , Christopher Hans BAKKER
IPC: B41J2/175
Abstract: This disclosure describes integrated circuits which may be provided in logic circuitry packages and/or replaceable print apparatus components with print material reservoirs. An integrated circuit or logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit and at least one logic circuit.
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公开(公告)号:US20210078334A1
公开(公告)日:2021-03-18
申请号:US16772997
申请日:2019-04-05
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Sirena Chi LU , Scott A. LINN , Stephen D. PANSHIN , David Owen ROETHIG , David N. OLSEN , Anthony D. STUDER , Michael W. CUMBIE , Jefferson P. WARD
Abstract: In an example, a method includes, by logic circuitry associated with a replaceable print apparatus component installed in a print apparatus, responding to a sensor data request received from the print apparatus by returning a first response; receiving a calibration parameter from the print apparatus; and returning a second response which is different from the first response.
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公开(公告)号:US20210402784A1
公开(公告)日:2021-12-30
申请号:US16769923
申请日:2019-10-25
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor: Stephen D. PANSHIN , Jefferson P. WARD , James Michael GARDNER , Anthony D. STUDER , David N. OLSEN , Quinton B. WEAVER , David Owen ROETHIG , Christopher Hans BAKKER , David B. NOVAK
IPC: B41J2/175
Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit, and a logic circuit having a communication address to communicate with the print apparatus logic circuit. The logic circuit is configured to detect, via the interface, communications that include an other communication address. The logic circuit is configured to respond, via the interface, to a command series directed to the logic circuit that include the communication address of the logic circuit, based on the detected communications.
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公开(公告)号:US20200171836A1
公开(公告)日:2020-06-04
申请号:US16502479
申请日:2019-07-03
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG , David N. OLSEN , Anthony D. STUDER , Michael W. CUMBIE , Sirena Chi LU
IPC: B41J2/175
Abstract: A logic circuit for a replaceable print component is configured to, in response to a plurality of commands including a first command specifying the new I2C communications address and a first calibration parameter, a second command specifying the new I2C communications address and a second calibration parameter, a third command specifying the new I2C communications address and a class parameter, and/or fourth commands specifying the new I2C communications address and sub-class parameters, and at least one read request, generate count values in a count value range defined by a highest and lowest count value.
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公开(公告)号:US20220129570A1
公开(公告)日:2022-04-28
申请号:US17569273
申请日:2022-01-05
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG
Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.
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公开(公告)号:US20210354472A1
公开(公告)日:2021-11-18
申请号:US16965231
申请日:2019-05-05
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG , David N. OLSEN , Anthony D. STUDER , Michael W. CUMBIE , Sirena Chi LU
Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
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公开(公告)号:US20220348022A1
公开(公告)日:2022-11-03
申请号:US17864662
申请日:2022-07-14
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG , David N. OLSEN , Anthony D. STUDER , Michael W. CUMBIE , Sirena Chi LU
IPC: B41J2/175 , B41J29/393 , G01L23/08 , G06F13/42 , G06F21/44 , G06K15/00 , B33Y50/00 , G03G15/08 , G06K15/10
Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
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公开(公告)号:US20210001635A1
公开(公告)日:2021-01-07
申请号:US16977675
申请日:2018-12-03
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG
Abstract: In an example, a logic circuit comprising a communications interface including a data contact to communicate via a communications bus, an enablement contact, separate from the communication interface, to receive an input to enable the logic circuit, and at least one memory register, comprising at least one reconfigurable address register. The logic circuit may be configured, such that, when enabled, it responds to communications sent via the communication bus which are addressed to the address held in a reconfigurable address register.
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公开(公告)号:US20210334391A1
公开(公告)日:2021-10-28
申请号:US16495227
申请日:2018-12-03
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG
Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component, responding to a first validation request sent via an I2C bus to a first address associated with the logic circuitry with a first validation response; and responding to a second validation request sent via the I2C bus to a second address associated with the logic circuitry with a second validation response.
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公开(公告)号:US20210046760A1
公开(公告)日:2021-02-18
申请号:US16965557
申请日:2019-04-05
Applicant: Hewlett-Packard Development Company, L.P.
Inventor: James Michael GARDNER , Scott A. LINN , Stephen D. PANSHIN , Jefferson P. WARD , David Owen ROETHIG , David N. OLSEN , Anthony D. STUDER , Michael W. CUMBIE
Abstract: In an example, a method comprises, by logic circuitry associated with a replaceable print apparatus component installed in a print apparatus, receiving a sensor data request and determining whether the request is for data indicative of a print material level or for data indicative of a pressurisation event. In the event that the request is a request for data indicative of the print material level, the method may comprise responding with a first data response in a first value range; and in the event that the request is a request for data indicative of a pressurisation event, the method may comprise responding with a second data response in a second value range.
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