公开(公告)号：US20160190020A1

公开(公告)日：2016-06-30

申请号：US14911651

申请日：2013-08-14

Applicant: HITACHI, LTD.

Inventor： Yoshinobu KIMURA ,  Natsuki TSUNO ,  Hiroya OHTA ,  Renichi YAMADA ,  Hirotaka HAMAMURA ,  Toshiyuki OHNO ,  Hiroyuki OKINO ,  Yuki MORI

IPC: H01L21/66 ,  G01R31/265

CPC classification number: H01L22/12 ,  G01R31/265 ,  H01L22/20 ,  H01L22/24

Abstract: In a semiconductor inspection method using a semiconductor inspection device, by selecting an incident energy and a negative potential and scanning an inspection surface of a wafer with primary electrons to detect secondary electrons, a first inspection image is acquired, and a macro defect, stacking faults, a basal plane dislocation and a threading dislocation contained in the first inspection image are discriminated by image processing based on a threshold value of a signal amount of the secondary electrons determined in advance. Moreover, by selecting the incident energy and a positive potential and scanning the inspection surface of the wafer with primary electrons to detect the secondary electrons, a second inspection image is acquired, and a threading screw dislocation of a dot-shaped figure contained in the second inspection image is discriminated by image processing based on a threshold value of a signal amount of the secondary electrons determined in advance.

Abstract translation: 在使用半导体检查装置的半导体检查方法中，通过选择入射能量和负电位并扫描具有一次电子的晶片的检查表面以检测二次电子，获得第一检查图像，并且存在宏观缺陷，堆垛层错 通过基于预先确定的二次电子的信号量的阈值的图像处理来判别包含在第一检查图像中的基底位错和穿透位错。 此外，通过选择入射能量和正电位并用一次电子扫描晶片的检查表面以检测二次电子，获得第二检查图像，并且包含在第二电极中的点状图形的螺纹螺钉脱位 基于预先确定的二次电子的信号量的阈值的图像处理来判别检查图像。

公开(公告)号：US20160111499A1

公开(公告)日：2016-04-21

申请号：US14778058

申请日：2013-03-29

Applicant: HITACHI, LTD.

Inventor： Digh HISAMOTO ,  Keisuke KOBAYASHI ,  Naoki TEGA ,  Toshiyuki OHNO ,  Hirotaka HAMAMURA ,  Mieko MATSUMURA

IPC: H01L29/16 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66 ,  H01L29/10 ,  H01L21/02

CPC classification number: H01L29/1608 ,  H01L21/02236 ,  H01L21/02255 ,  H01L21/045 ,  H01L21/0475 ,  H01L21/049 ,  H01L29/0619 ,  H01L29/1033 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/872

Abstract: A MOSFET using a SiC substrate has a problem that a carbon-excess layer is formed on a surface by the application of mechanical stress due to thermal oxidation and the carbon-excess layer degrades mobility of channel carriers. In the invention, (1) a layer containing carbon-carbon bonds is removed; (2) a gate insulating film is formed by a deposition method; and (3) an interface between a crystal surface and the insulating film is subjected to an interface treatment at a low temperature for a short time. Due to this, the carbon-excess layer causing characteristic degradation is effectively eliminated, and at the same time, dangling bonds can be effectively eliminated by subjecting an oxide film and an oxynitride film to an interface treatment.

Abstract translation: 使用SiC衬底的MOSFET具有通过由于热氧化施加机械应力而在表面上形成碳过量层的问题，并且碳过量层降低沟道载流子的迁移率。 在本发明中，（1）除去含有碳 - 碳键的层; （2）通过沉积方法形成栅极绝缘膜; 和（3）晶体表面和绝缘膜之间的界面在短时间内在低温下进行界面处理。 由此，有效地消除了引起特性劣化的碳过量层，同时通过使氧化膜和氧氮化物膜进行界面处理，可以有效地消除悬挂键。