Gallium Nitride Power Transistor
    1.
    发明公开

    公开(公告)号:US20230411486A1

    公开(公告)日:2023-12-21

    申请号:US18460216

    申请日:2023-09-01

    摘要: The disclosure relates to a Gallium Nitride power transistor, comprising: a buffer layer; and a barrier layer having a top side, a bottom side, the bottom side facing the buffer layer, the bottom side of the barrier layer is placed on the buffer layer; an interlayer interposed between a p-type doped Gallium Nitride layer and a metal gate layer, the interlayer is made of a III-V compound semiconductor comprising a combination of at least one group III element with at least one group V element, the p-type doped Gallium Nitride layer is placed on the top side of the barrier layer, the metal gate layer is electrically connected to the p-type doped Gallium Nitride layer via the interlayer to form a rectifying metal-semiconductor junction with the p-type doped Gallium Nitride layer.

    GALLIUM NITRIDE POWER TRANSISTOR
    3.
    发明公开

    公开(公告)号:US20230335597A1

    公开(公告)日:2023-10-19

    申请号:US18338125

    申请日:2023-06-20

    发明人: Gilberto Curatola

    摘要: The present disclosure relates to a Gallium Nitride (GaN) power transistor, comprising: a buffer layer; a barrier layer deposited on the buffer layer, wherein a gate region is formed on top of the barrier layer; a p-type doped GaN layer deposited on the barrier layer at the gate region; and a metal gate layer deposited on top of the p-type doped GaN layer, wherein the metal gate layer is contacting the p-type doped GaN layer to form a Schottky barrier, wherein a thickness of the p-type doped GaN layer, a metal type of the metal gate layer and a p-type doping concentration of the p-type doped GaN layer are based on a known relationship of a pGaN Schottky gate depletion region thickness with respect to a p-type doping concentration and a gate metal type.