公开(公告)号：US20210028771A1

公开(公告)日：2021-01-28

申请号：US17069514

申请日：2020-10-13

Applicant: Huawei Technologies Co., Ltd.

Inventor： Mikko John ENGLUND ,  Kimmo KOLI

IPC: H03H17/02 ,  H03D7/00

Abstract: An electrical circuit can have a local oscillator, a first mixer, a second mixer, and a delay element. The first mixer mixes an input signal with a local oscillator signal. The second mixer mixes the input signal with a delayed local oscillator signal, delayed by the delay element. The output signals from the first mixers are combined to form an output signal of the electrical circuit.

公开(公告)号：US20190013817A1

公开(公告)日：2019-01-10

申请号：US16127871

申请日：2018-09-11

Applicant: Huawei Technologies Co., Ltd.

Inventor： Kimmo KOLI

IPC: H03M1/08 ,  H03M1/00 ,  H03M1/46 ,  H03M1/44

Abstract: A flash analog to digital converter (ADC) includes a first, second, and third double data rate comparator core configured to determine a relative voltage of a first differential input signal during each of a rising edge and a falling edge in a single clock cycle of a comparator clock input to the comparator core. An inverted comparator clock coupled to the third comparator core reduces kickback noise. The ADC includes a first and a second floating voltage reference configured to shift a voltage of a differential comparator input by a fixed amount, and produce the first and second differential input signal. The third comparator core is cross coupled between the first and second comparator core.

公开(公告)号：US20200321974A1

公开(公告)日：2020-10-08

申请号：US16906231

申请日：2020-06-19

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Kimmo KOLI

IPC: H03M3/00 ,  H03M1/66

Abstract: A receiver is described, the receiver comprising an ABB filter stage, an ADC stage. The ABB filter stage comprises an ABB filter stage input configured to receive an analog baseband, BB, signal and an ABB filter stage output configured to provide a filtered analog BB signal. The ADC stage comprises an ADC stage input configured to receive the filtered analog BB signal and an ADC stage output configured to provide a digital BB signal. The ADC stage comprises an ADC comprising an ADC input configured to receive the filtered analog BB signal or a signal derived therefrom as an ADC input signal, and wherein the ADC is configured to perform an analog-to-digital, A/D, conversion of the ADC input signal to derive the digital BB signal.

公开(公告)号：US20190253068A1

公开(公告)日：2019-08-15

申请号：US16392899

申请日：2019-04-24

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Kimmo KOLI

IPC: H03M3/00 ,  H03M1/66

CPC classification number: H03M3/372 ,  H03M1/66 ,  H03M3/464

Abstract: A receiver is described, the receiver comprising an ABB filter stage, an ADC stage. The ABB filter stage comprises an ABB filter stage input configured to receive an analog baseband, BB, signal and an ABB filter stage output configured to provide a filtered analog BB signal. The ADC stage comprises an ADC stage input configured to receive the filtered analog BB signal and an ADC stage output configured to provide a digital BB signal. The ADC stage comprises an ADC comprising an ADC input configured to receive the filtered analog BB signal or a signal derived therefrom as an ADC input signal, and wherein the ADC is configured to perform an analog-to-digital, A/D, conversion of the ADC input signal to derive the digital BB signal.