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    Image display device and driving method thereof
    2.
    发明授权
    Image display device and driving method thereof 有权
    图像显示装置及其驱动方法

    公开(公告)号：US06873313B2

    公开(公告)日：2005-03-29

    申请号：US09822768

    申请日：2001-03-30

    申请人： Hajime Washio ,  Nobuhiro Kuwabara ,  Hiroshi Yoneda ,  Shigeto Yoshida

    发明人： Hajime Washio ,  Nobuhiro Kuwabara ,  Hiroshi Yoneda ,  Shigeto Yoshida

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3696 ,  G09G3/3614 ,  G09G3/3685 ,  G09G2310/0232 ,  G09G2310/0251 ,  G09G2330/021

    摘要： An image display device of this invention includes a pre-charging voltage stabilizing section having current controlling means and charge holding means which respectively include a resistor and a capacitor to stabilize a pre-charging voltage. The charge holding means holds a voltage to be supplied to data signal lines, and the current controlling means suppresses a current flow from a control signal generating circuit, thereby suppressing power fluctuation at the control signal generating circuit. This suppresses fluctuation in the pre-charging voltage and enables data signal lines to be charged to a predetermined voltage, thereby suppressing deterioration of image quality and an increase in power consumption of the image display device. Further, when using the pre-charging voltage stabilizing section and setting a portion of a display as a video data non-display area avoiding display of video data in a non-match image display mode to display at fixed brightness in the video data non-display area by a pre-charging voltage from a pre-charging circuit, a control signal is suspended in a fixed period, thus realizing a non-match image display mode to display a video image of an aspect ratio different from that of a screen of a display without impairing an image quality, and saving power.

    摘要翻译： 本发明的图像显示装置包括具有电流控制装置和电荷保持装置的预充电电压稳定部分，其分别包括用于稳定预充电电压的电阻器和电容器。 电荷保持装置保持要提供给数据信号线的电压，并且电流控制装置抑制来自控制信号发生电路的电流，从而抑制控制信号发生电路的功率波动。 这抑制了预充电电压的波动，并且能够使数据信号线被充电到预定电压，从而抑制图像质量的劣化和图像显示装置的功耗的增加。 此外，当使用预充电电压稳定部分并且将显示器的一部分设置为视频数据非显示区域时，避免以不匹配的图像显示模式显示视频数据，以在视频数据非显示区域中以固定亮度显示， 通过来自预充电电路的预充电电压来显示区域，控制信号以固定的时间段被暂停，从而实现不匹配的图像显示模式，以显示不同于屏幕的宽高比的视频图像 显示而不损害图像质量，并且节省电力。

    Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices
    3.
    发明授权
    Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 有权
    移位寄存器电路，具有电路的图像显示装置以及LCD装置的驱动方法

    公开(公告)号：US06879313B1

    公开(公告)日：2005-04-12

    申请号：US09523511

    申请日：2000-03-10

    申请人： Yasushi Kubota ,  Hajime Washio ,  Shigeto Yoshida ,  Kazuhiro Maeda ,  Hiroshi Yoneda

    发明人： Yasushi Kubota ,  Hajime Washio ,  Shigeto Yoshida ,  Kazuhiro Maeda ,  Hiroshi Yoneda

    IPC分类号： G09G3/36 ,  G11C19/28 ,  G11C19/00

    CPC分类号： G09G3/3688 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2320/0233 ,  G11C19/28

    摘要： A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.

    摘要翻译： 移位寄存器电路包括串联连接的多个锁存电路，以顺序地将脉冲信号ST从一个传送到另一个，一个发送时钟信号CLK的时钟信号线以及执行时钟信号之间的电连接和断开的多个开关电路 线和多个锁存电路。 在接通移位寄存器时，至少一个开关电路将至少一个锁存电路与时钟信号线电断开。 在电源接通之后的初始化期间，时钟信号CLK的频率比正常运行期间低，并且在正常运行期间逐渐增大。

    Active-matrix-type image display and a driving method thereof
    6.
    发明授权
    Active-matrix-type image display and a driving method thereof 失效
    有源矩阵型图像显示及其驱动方法

    公开(公告)号：US06507332B1

    公开(公告)日：2003-01-14

    申请号：US09099018

    申请日：1998-06-17

    申请人： Nobuhiro Kuwabara ,  Hiroshi Yoneda ,  Akihito Jinda

    发明人： Nobuhiro Kuwabara ,  Hiroshi Yoneda ,  Akihito Jinda

    IPC分类号： G09G336

    CPC分类号： G09G3/3688 ,  G09G5/006 ,  G09G2300/0408 ,  G09G2310/0297 ,  G09G2320/0276 ,  G09G2352/00

    摘要： A driving method for an active-matrix-type image display in which: in the case when the number of divisions of a video signal decreases in accordance with the scanning frequency of an original video signal, eight video signal lines 31a through 31h are divided into groups the number of which corresponds the reduced number of divisions so that the same video signal is inputted to the video signal lines 31 belonging to the same group; and four systems of shift registers SRA through SRD are also divided into groups, SRA, SRB, SRC and SRD so that the same shift clock signal is inputted to the same group. With this method, even upon application of the device to a usage having a different scanning frequency, the construction of the external circuits are optimized so as to fit the different scanning frequency, and the shared use of the substrate is available so that cost reduction is achieved.

    摘要翻译： 一种有源矩阵型图像显示的驱动方法，其中：在视频信号的分割数根据原始视频信号的扫描频率而减少的情况下，将八个视频信号线31a至31h分成 将其数量分组对应于减少的分割数，使得相同的视频信号被输入到属于同一组的视频信号线31; 并且移位寄存器SRA至SRD的四个系统也被划分为组SRA，SRB，SRC和SRD，使得相同的移位时钟信号被输入到同一组。 利用这种方法，即使在将设备应用于具有不同扫描频率的用途的情况下，外部电路的结构被优化以适应不同的扫描频率，并且基板的共享使用是可用的，从而降低成本 实现了

    Image display device
    7.
    发明授权
    Image display device 失效
    图像显示装置

    公开(公告)号：US06288699B1

    公开(公告)日：2001-09-11

    申请号：US09349379

    申请日：1999-07-09

    申请人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai ,  Hiroshi Yoneda ,  Nobuhiro Kuwabara

    发明人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai ,  Hiroshi Yoneda ,  Nobuhiro Kuwabara

    IPC分类号： G09G336

    CPC分类号： G09G5/008 ,  G09G3/20 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2310/08 ,  H03L7/00

    摘要： A delay detecting section detects the phase difference between a first detection signal as a reference and a second detection signal produced by delaying the first detection signal with part of a data signal line driving circuit itself or part of a circuit formed by the same process as the data signal line driving circuit. A phase adjusting section presumes an internal delay of the data signal line driving circuit, and adjusts the phase difference between a clock signal and start signal, and a video signal so that the data signal line driving circuit samples the video signal at an appropriate timing. These structures prevent a lowering of the image quality due to a difference in the timings of the video signal and sampling signal, and provide an image display device capable of displaying a good-quality image with a simple circuit structure.

    摘要翻译： 延迟检测部分检测作为基准的第一检测信号和通过用数据信号线驱动电路本身的一部分延迟第一检测信号而产生的第二检测信号或通过与第一检测信号相同的处理形成的电路的一部分来产生的第二检测信号 数据信号线驱动电路。 相位调整部分假设数据信号线驱动电路的内部延迟，并且调整时钟信号和起始信号之间的相位差和视频信号，使得数据信号线驱动电路在适当的定时对视频信号进行采样。 这些结构防止由于视频信号和采样信号的定时的差异导致的图像质量的降低，并且提供能够以简单的电路结构显示优质图像的图像显示装置。

    Semiconductor device
    9.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US5610414A

    公开(公告)日：1997-03-11

    申请号：US275676

    申请日：1994-07-15

    申请人： Hiroshi Yoneda ,  Shigeto Yoshida ,  Kenichi Katoh ,  Yasukuni Yamane ,  Yutaka Ishii

    发明人： Hiroshi Yoneda ,  Shigeto Yoshida ,  Kenichi Katoh ,  Yasukuni Yamane ,  Yutaka Ishii

    IPC分类号： G02F1/13 ,  G02F1/1362 ,  G09G3/36 ,  H01L23/528 ,  H01L29/04 ,  H01L27/10 ,  H01L33/00

    CPC分类号： G09G3/3688 ,  G09G3/3611 ,  H01L23/528 ,  G02F1/13452 ,  G02F1/1362 ,  G09G2320/0223 ,  H01L2924/0002 ,  H01L2924/3011

    摘要： In a semiconductor device wherein an active device circuit and electrically conductive lines, such as a power source line for supplying power to the semiconductor active device circuit or signal lines for inputting a signal to the semiconductor active device circuit, are formed together on a single substrate, an improved arrangement wherein a conventional power source or signal line is formed by using a plurally of individual lines of substantially uniform electrical resistance where the electrical resistance of each line is limited to a predetermined value. Moreover, a waveform deterioration response signal component is added to a signal transmitted through the signal lines so as to improve the transmitted signal by compensating for waveform deterioration experienced during circuit operation. In addition, an electrical capacity forming electrode is provided alongside substantial length of the power source line. A capacitor is thus effectively formed within the active device circuit by intervening a dielectric between the power source line and the capacity forming electrode so as to reduce high-frequency noise which occurs in the power source line. The disclosed arrangements substantially reduce the occurrence of an irregular operation in the active device circuit.

    摘要翻译： 在半导体器件中，其中有源器件电路和诸如用于向半导体有源器件电路供电的电源线或用于向半导体有源器件电路输入信号的信号线的导电线一起形成在单个衬底上 是一种改进的布置，其中通过使用多条具有基本均匀的电阻的各条线形成常规电源或信号线，其中每条线的电阻被限制在预定值。 此外，波形劣化响应信号分量被添加到通过信号线传输的信号，以通过补偿电路操作期间经历的波形劣化来改善发送信号。 此外，沿电源线的大部分长度设置电容形成电极。 因此，通过在电源线和电容形成电极之间插入电介质来有效地在有源器件电路内形成电容器，以便减少在电源线中发生的高频噪声。 所公开的布置基本上减少了有源器件电路中的不规则操作的发生。