公开(公告)号：US06618043B2

公开(公告)日：2003-09-09

申请号：US09504418

申请日：2000-02-15

申请人： Hajime Washio ,  Yasushi Kubota ,  Yasuyoshi Kaise ,  Tamotsu Sakai ,  Kazuhiro Maeda

发明人： Hajime Washio ,  Yasushi Kubota ,  Yasuyoshi Kaise ,  Tamotsu Sakai ,  Kazuhiro Maeda

IPC分类号： G09G500

CPC分类号： G09G3/3648 ,  G09G2310/0248 ,  G09G2330/021

摘要： A precharge circuit is composed of (a) a reference signal input section, to which at least one precharge reference potential is inputted, (b) a control signal input section, to which at least one control signal is inputted, (c) a plurality of signal delay sections for sequentially delaying an output of the control signal input section, and (d) a reference signal switching section for switching, in accordance with outputs of the signal delay sections, between a state of outputting the precharge reference potential of the reference signal input section to each of the data signal lines and a state of non-outputting the same thereto. With this arrangement, the precharge control signal is sequentially delayed within the precharge circuit by the delay circuits composed of inverter circuits or the like, so that timings at which the precharge reference potential is written in the data signal lines are dispersed. By sequentially delaying the control signal within the precharge circuit, reduction of power consumption and excellent image display are realized.

公开(公告)号：US06492972B1

公开(公告)日：2002-12-10

申请号：US09275261

申请日：1999-03-23

申请人： Yasushi Kubota ,  Tamotsu Sakai ,  Hajime Washio

发明人： Yasushi Kubota ,  Tamotsu Sakai ,  Hajime Washio

IPC分类号： G09G336

CPC分类号： G09G3/3688 ,  G09G2300/0408 ,  G09G2320/0209

摘要： A data signal line driving circuit which sequentially forms a plurality of sampling signals and continuously samples input signals to output such input signals, in response to the plurality of sampling signals, wherein the sampling signals respectively represent sampling periods thereof which are different from each other, and a pulse width of each of the sampling signals is prescribed to be small so that rising and falling of each of the sampling signals do not overlap each other.

摘要翻译： 数据信号线驱动电路，响应于多个采样信号顺次形成多个采样信号并连续采样输入信号以输出这些输入信号，其中采样信号分别表示彼此不同的采样周期， 并且将每个采样信号的脉冲宽度规定为较小，使得每个采样信号的上升和下降彼此不重叠。

公开(公告)号：US07711526B2

公开(公告)日：2010-05-04

申请号：US10891083

申请日：2004-07-15

申请人： Kazuhiro Maeda ,  Tamotsu Sakai ,  Yasushi Kubota ,  Shigeki Imai ,  Kenshi Tada ,  Kenji Taniguchi

发明人： Kazuhiro Maeda ,  Tamotsu Sakai ,  Yasushi Kubota ,  Shigeki Imai ,  Kenshi Tada ,  Kenji Taniguchi

IPC分类号： G06F7/60 ,  G06G7/62

CPC分类号： G06F17/5036

摘要： A transistor model for a simulator simulates a resistance between a source region and a drain region with a model equation which has terms representing resistance values corresponding respectively to areas of mutually different impurity concentrations below a gate section in simulating characteristics of a transistor. At least two of the terms each having a threshold parameter indicating a voltage at which a semiconductor element composed of the associated region and regions adjacent to that region changes from an ON state to an OFF state. The threshold parameters of the terms being specified independently from each other. Thus, the characteristics of a transistor having a set of areas of mutually different impurity concentrations below a gate section, inclusive of subthreshold regions which are difficult to evaluate through actual measurement, can be simulated to high accuracy while preserving a good fit with a capacitance model.

摘要翻译： 用于模拟器的晶体管模型利用模拟方程来模拟源极区域和漏极区域之间的电阻，其模型方程具有表示在模拟晶体管的特性中分别对应于栅极部分的相互不同的杂质浓度的区域的电阻值的项。 每个术语中的至少两个术语具有表示由相关区域和与该区域相邻的区域组成的半导体元件的电压的阈值参数从ON状态变为OFF状态。 术语的阈值参数彼此独立地指定。 因此，通过实际测量难以评估的具有低于栅极部分的杂质浓度相互不同的杂质浓度的区域的集合的特性可以被模拟成高精度，同时保持与电容模型的良好匹配 。

公开(公告)号：US20050015235A1

公开(公告)日：2005-01-20

申请号：US10891083

申请日：2004-07-15

申请人： Kazuhiro Maeda ,  Tamotsu Sakai ,  Yasushi Kubota ,  Shigeki Imai ,  Kenshi Tada ,  Kenji Taniguchi

发明人： Kazuhiro Maeda ,  Tamotsu Sakai ,  Yasushi Kubota ,  Shigeki Imai ,  Kenshi Tada ,  Kenji Taniguchi

IPC分类号： G06F17/50 ,  H01L21/336 ,  H01L29/00 ,  H01L29/78 ,  H01L29/786

CPC分类号： G06F17/5036

摘要： A transistor model for a simulator simulates a resistance between a source region and a drain region with a model equation which has terms representing resistance values corresponding respectively to areas of mutually different impurity concentrations below a gate section in simulating characteristics of a transistor. At least two of the terms each having a threshold parameter indicating a voltage at which a semiconductor element composed of the associated region and regions adjacent to that region changes from an ON state to an OFF state. The threshold parameters of the terms being specified independently from each other. Thus, the characteristics of a transistor having a set of areas of mutually different impurity concentrations below a gate section, inclusive of subthreshold regions which are difficult to evaluate through actual measurement, can be simulated to high accuracy while preserving a good fit with a capacitance model.

摘要翻译： 用于模拟器的晶体管模型利用模拟方程来模拟源极区域和漏极区域之间的电阻，其模型方程具有表示在模拟晶体管的特性中分别对应于栅极部分的相互不同的杂质浓度的区域的电阻值的项。 每个术语中的至少两个术语具有表示由相关区域和与该区域相邻的区域组成的半导体元件的电压的阈值参数从ON状态变为OFF状态。 术语的阈值参数彼此独立地指定。 因此，通过实际测量难以评估的具有低于栅极部分的杂质浓度相互不同的杂质浓度的区域的集合的特性可以被模拟成高精度，同时保持与电容模型的良好匹配 。

公开(公告)号：US06465806B2

公开(公告)日：2002-10-15

申请号：US09095587

申请日：1998-06-11

申请人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai ,  Zhang Hongyong ,  Jun Koyama

发明人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai ,  Zhang Hongyong ,  Jun Koyama

IPC分类号： H01L2904

CPC分类号： H01L23/5226 ,  G02F1/1345 ,  G02F1/13454 ,  G09G3/3688 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first conductive layer; an interlayer insulative layer having an opening; and a second conductive layer. The first conductive layer, the interlayer insulative layer and the second conductive layer are sequentially laminated. The opening is partially covered by the second conductive layer, and an area of the first conductive layer is substantially entirely covered by the second conductive layer in the opening.

摘要翻译： 半导体器件包括第一导电层; 具有开口的层间绝缘层; 和第二导电层。 第一导电层，层间绝缘层和第二导电层依次层叠。 开口部分被第二导电层覆盖，并且第一导电层的面积基本上完全被开口中的第二导电层覆盖。

公开(公告)号：US06373460B1

公开(公告)日：2002-04-16

申请号：US09684912

申请日：2000-10-10

申请人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai

发明人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai

IPC分类号： G09G336

CPC分类号： G09G3/3674 ,  G09G3/20 ,  G09G3/3648 ,  G09G3/3685 ,  G09G2300/0408 ,  G09G2310/0289 ,  G09G2310/06 ,  H01L27/12 ,  H01L29/78

摘要： A matrix-type image display device of the present invention is arranged such that image data are selectively applied to pixels arranged in a matrix form through scanning signal lines and data signal lines, and the image data are stored therein, wherein a high potential of a sampling pulse 0V/5V to be output from a logic circuit is shifted to 10 V, and a low potential thereof is shifted to −8 V respectively by first and second level shifters. As a result, a difference between an input signal level from an external circuit such as a control circuit, an image signal processing circuit, etc., and an actual driving signal level of each pixel can be absorbed. Therefore, an additional structure such as an interface circuit, etc., is not needed between the external circuit and the scanning signal line driving circuit, thereby enabling a low cost and a low power consumption.

摘要翻译： 本发明的矩阵型图像显示装置被布置成使得图像数据被选择性地施加到通过扫描信号线和数据信号线以矩阵形式布置的像素，并且图像数据被存储在其中，其中高电位 从逻辑电路输出的采样脉冲0V / 5V被移位到10V，并且其低电位分别由第一和第二电平移位器移位到-8V。 结果，可以吸收来自诸如控制电路的外部电路的输入信号电平，图像信号处理电路等之间的差异和每个像素的实际驱动信号电平之间的差异。 因此，在外部电路和扫描信号线驱动电路之间不需要诸如接口电路等的附加结构，从而能够实现低成本和低功耗。

公开(公告)号：US5712653A

公开(公告)日：1998-01-27

申请号：US363217

申请日：1994-12-23

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hiroshi Yoneda ,  Tamotsu Sakai

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hiroshi Yoneda ,  Tamotsu Sakai

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/0297 ,  G09G2330/08 ,  G09G3/2011

摘要： An active-matrix image display device which includes n shift registers, analog switches for sampling video input signals and a data-signal-line driving circuit to which n series of clock signals and n.times.m series of video input signals are input, and controls the analog switches according to the result of a logic operation of output pulses from successive l stages in the shift registers. A scanning circuit without using shift registers. Here, n is an integer not smaller than one, m and l are integers not smaller than two. With the image display device, sampling of video signals is surely executed without increasing the number of shift registers. It is thus possible to reduce the size and weight of the image display device and to decrease the defect rate thereof. Moreover, the scanning circuit achieves a higher yield compared with a conventional scanning circuit using a shift register.

公开(公告)号：US6157361A

公开(公告)日：2000-12-05

申请号：US892157

申请日：1997-07-14

申请人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai

发明人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  G11C19/00 ,  H01L27/12 ,  H01L29/78

CPC分类号： G09G3/3674 ,  G09G3/3685 ,  G09G2300/0408 ,  G09G2310/0289 ,  G09G2310/06 ,  G09G3/20 ,  G09G3/3648 ,  H01L27/12 ,  H01L29/78

摘要： A matrix-type image display device of the present invention is arranged such that image data are selectively applied to pixels arranged in a matrix form through scanning signal lines and data signal lines, and the image data are stored therein, wherein a high potential of a sampling pulse 0V/5V to be output from a logic circuit is shifted to 10 V, and a low potential thereof is shifted to -8 V respectively by first and second level shifters. As a result, a difference between an input signal level from an external circuit such as a control circuit, an image signal processing circuit, etc., and an actual driving signal level of each pixel can be absorbed. Therefore, an additional structure such as an interface circuit, etc., is not needed between the external circuit and the scanning signal line driving circuit, thereby enabling a low cost and a low power consumption.

摘要翻译： 本发明的矩阵型图像显示装置被布置成使得图像数据被选择性地施加到通过扫描信号线和数据信号线以矩阵形式布置的像素，并且图像数据被存储在其中，其中高电位 从逻辑电路输出的采样脉冲0V / 5V被移位到10V，并且其低电位分别由第一和第二电平移位器移位到-8V。 结果，可以吸收来自诸如控制电路的外部电路的输入信号电平，图像信号处理电路等之间的差异和每个像素的实际驱动信号电平之间的差异。 因此，在外部电路和扫描信号线驱动电路之间不需要诸如接口电路等的附加结构，从而能够实现低成本和低功耗。

公开(公告)号：US07079121B2

公开(公告)日：2006-07-18

申请号：US09928988

申请日：2001-08-15

申请人： Jun Koyama ,  Yukio Tanaka ,  Yasushi Kubota ,  Tamotsu Sakai

发明人： Jun Koyama ,  Yukio Tanaka ,  Yasushi Kubota ,  Tamotsu Sakai

IPC分类号： G09G3/36

CPC分类号： H01L27/124 ,  G02F1/1362 ,  G02F2001/13629 ,  G09G3/3685 ,  G09G2300/0426 ,  G09G2320/0209 ,  G09G2320/0223

摘要： A driving circuit of a liquid crystal display device including a first insulating substrate on which a plurality of signal lines and a plurality of scan lines are disposed, and pixel transistors made of thin film transistors are disposed in matrix at intersection points of those lines; a second insulating substrate opposite to the first insulating substrate; and a liquid crystal held between the first and second insulating substrates, in which the driving circuit is disposed on the first insulating substrate; each of clock lines or base portions of the clock lines for supplying clock signals to the driving circuit is made of a two-layer structure of the same wiring material as a gate electrode of the thin film transistor and the same wiring material as a source electrode or drain electrode of the thin film transistor; and a wiring line crossing the clock lines or the base portions of the clock lines is made of a wiring line in the same layer as a black matrix covering the pixel transistors.

公开(公告)号：US06335778B1

公开(公告)日：2002-01-01

申请号：US08901649

申请日：1997-07-28

申请人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai

发明人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai

IPC分类号： G02F11345

CPC分类号： G09G3/3648 ,  G02F1/13454 ,  G09G3/2074 ,  G09G2300/0408 ,  G09G2310/027

摘要： An active matrix type liquid crystal display device carries out half-tone display with an area gray scale display method, according to which a pixel is composed of a plurality of subpixels and the area of display regions is changed by an image signal that is a binary signal. The amplitude of an opposite electrode is optimized by configuring a data signal line driving circuit with a scanning circuit, latch-in circuits and outputting circuits. This eliminates the needs to externally input an analogue signal and an intermediate voltage, and enables the driving circuit to be configured only with digital circuits. The driving circuit is integrated to prevent increases in cost of the driving circuit and of mounting the driving circuit that are caused by an increase in the number of data signal lines as a result of the adoption of the area gray scale display method. Consequently, it becomes possible to make an attempt to reduce the cost, power consumption and non-defective ratio of the entire system.

摘要翻译： 有源矩阵型液晶显示装置利用区域灰度显示方法进行半色调显示，根据该方式，像素由多个子像素构成，显示区域的区域由二进制图像信号改变 信号。 通过配置具有扫描电路，锁存电路和输出电路的数据信号线驱动电路来优化对置电极的振幅。 这消除了外部输入模拟信号和中间电压的需要，并且使得驱动电路仅被配置为数字电路。 集成了驱动电路，以防止由于采用区域灰度显示方法而导致数据信号线的数量增加而导致的驱动电路的成本增加和驱动电路的安装。 因此，可以尝试降低整个系统的成本，功耗和无缺陷率。