Method for controlling uplink access in wireless communication system
    3.
    发明授权
    Method for controlling uplink access in wireless communication system 有权
    用于控制无线通信系统中的上行接入的方法

    公开(公告)号:US08780747B2

    公开(公告)日:2014-07-15

    申请号:US13266239

    申请日:2010-04-30

    IPC分类号: H04L1/00 H04L12/26

    CPC分类号: H04L43/0847 H04W74/085

    摘要: A method of controlling uplink access in a wireless communication system is provided. The method includes: generating an access probability sequence consisting of an access probability determined with respect to a radio resource used for data transmission; transmitting data according to the access probability included in the access probability sequence; receiving a success/failure result on the data transmission; and regulating the access probability used in the data transmission according to the success/failure result. Accordingly, each user equipment performs a simple control process for attempting random uplink access according to an access probability sequence and for changing the access probability sequence according to success/failure of uplink data transmission, thereby decreasing a probability of collision between user equipments, thereby increasing data transmission efficiency in a system employing a plurality of user equipments.

    摘要翻译: 提供了一种在无线通信系统中控制上行链路接入的方法。 该方法包括:生成由相对于用于数据传输的无线电资源确定的接入概率组成的接入概率序列; 根据接入概率序列中包含的接入概率发送数据; 在数据传输上接收成功/失败的结果; 并根据成功/失败的结果调整数据传输中使用的访问概率。 因此,每个用户设备根据访问概率序列执行用于尝试随机上行链路接入的简单控制处理,并且根据上行链路数据传输的成功/失败来改变接入概率序列,从而降低用户设备之间的冲突概率,从而增加 在使用多个用户设备的系统中的数据传输效率。

    METHOD FOR CONTROLLING UPLINK ACCESS IN WIRELESS COMMUNICATION SYSTEM
    4.
    发明申请
    METHOD FOR CONTROLLING UPLINK ACCESS IN WIRELESS COMMUNICATION SYSTEM 有权
    在无线通信系统中控制上行接入的方法

    公开(公告)号:US20120051251A1

    公开(公告)日:2012-03-01

    申请号:US13266239

    申请日:2010-04-30

    IPC分类号: H04W24/00 H04L12/26

    CPC分类号: H04L43/0847 H04W74/085

    摘要: A method of controlling uplink access in a wireless communication system is provided. The method includes: generating an access probability sequence consisting of an access probability determined with respect to a radio resource used for data transmission; transmitting data according to the access probability included in the access probability sequence; receiving a success/failure result on the data transmission; and regulating the access probability used in the data transmission according to the success/failure result. Accordingly, each user equipment performs a simple control process for attempting random uplink access according to an access probability sequence and for changing the access probability sequence according to success/failure of uplink data transmission, thereby decreasing a probability of collision between user equipments, thereby increasing data transmission efficiency in a system employing a plurality of user equipments.

    摘要翻译: 提供了一种在无线通信系统中控制上行链路接入的方法。 该方法包括:生成由相对于用于数据传输的无线电资源确定的接入概率组成的接入概率序列; 根据接入概率序列中包含的接入概率发送数据; 在数据传输上接收成功/失败的结果; 并根据成功/失败的结果调整数据传输中使用的访问概率。 因此,每个用户设备根据访问概率序列执行用于尝试随机上行链路接入的简单控制处理,并且根据上行链路数据传输的成功/失败来改变接入概率序列,从而降低用户设备之间的冲突概率,从而增加 在使用多个用户设备的系统中的数据传输效率。

    Data transmission method in passive communication system
    5.
    发明授权
    Data transmission method in passive communication system 有权
    无源通信系统中的数据传输方式

    公开(公告)号:US09136977B2

    公开(公告)日:2015-09-15

    申请号:US13809792

    申请日:2011-01-24

    摘要: This invention relates to a data transmission method in a passive communication system being wirelessly powered up and being passively operable, without using its own power, for data transmission and reception, such as in a passive RFID (Radio Frequency IDentification) communication system, which is capable of effectively configuring a message transmitted by a passive device, thereby providing improved transmission efficiency.

    摘要翻译: 本发明涉及一种无源通信系统中的无线通信系统中的数据传输方法,该无线通信系统在无需使用自身功率的情况下被无源地加电并被动地进行数据传输和接收,例如在无源RFID(射频识别)通信系统中, 能够有效地配置由无源装置发送的消息,从而提供改善的传输效率。

    APPARATUS AND METHOD FOR BLOCK INTERLEAVING USING MIXED RADIX SYSTEM IN MB-OFDM
    6.
    发明申请
    APPARATUS AND METHOD FOR BLOCK INTERLEAVING USING MIXED RADIX SYSTEM IN MB-OFDM 失效
    在MB-OFDM中使用混合RADIX系统进行块交错的装置和方法

    公开(公告)号:US20090086835A1

    公开(公告)日:2009-04-02

    申请号:US11934492

    申请日:2007-11-02

    IPC分类号: H04L27/28

    摘要: A block interleaving apparatus for block interleaving M-bit input streams to be transferred with a modulus k using a mixed radix system in a multi-band orthogonal frequency division multiplexing communication system, including an array processor having an array including M cells in which the number of columns is k and the number of rows is M/k. The array processor inputs the input streams from the bottom-right cell up to the top-left last cell in the horizontal direction, and, after the first bit of the input streams reaches the last cell, generates interleaved output streams by changing the output of the array processor from horizontal direction to vertical direction.

    摘要翻译: 一种块交织装置,用于在多频带正交频分复用通信系统中使用混合小数系统块模块交织M位输入流以使用混合小数系统进行传输,包括阵列处理器,阵列处理器具有包括M个单元的阵列, 的列为k,行数为M / k。 阵列处理器将输入流从右下角单元格输入到左上角单元格的水平方向,并且在输入流的第一位到达最后一个单元格之后,通过改变输出流的输出 阵列处理器从水平方向到垂直方向。

    System and method for translating high-level programming language code into hardware description language code
    7.
    发明授权
    System and method for translating high-level programming language code into hardware description language code 有权
    将高级编程语言代码翻译成硬件描述语言代码的系统和方法

    公开(公告)号:US08448150B2

    公开(公告)日:2013-05-21

    申请号:US12609604

    申请日:2009-10-30

    IPC分类号: G06F9/45

    CPC分类号: G06F17/5045 G06F8/447

    摘要: The present invention is directed to a method and system for translating a high-level language (HLL) code such as C, C++, Fortran, Java or the like into a HDL code such as Verilog or VHDL which requires no modification in the original HLL source code, while supporting a cross call between software and hardware, and even recursive calls in hardware. The system includes: a HLL-to-HLL source translator which reads user programming directive from a translation-targeted high-level language code marked with the user directive, and separates the translation-targeted high-level language code into a hardware code part and a software code part; a main compiler which compiles the software code part; a HLL-to-HDL translator which includes the front-end and middle-end of the main compiler and a HDL backend; a main core which executes the compiled software code part; and a dedicated hardware which executes the HDL code.

    摘要翻译: 本发明涉及用于将诸如C,C ++,Fortran,Java等的高级语言(HLL)代码转换成诸如Verilog或VHDL的HDL代码的方法和系统,其不需要在原始HLL中进行修改 源代码,同时支持软件和硬件之间的交叉调用,甚至硬件中的递归调用。 该系统包括:HLL至HLL源翻译器,其从由用户指令标记的面向翻译的高级语言代码读取用户编程指令,并将翻译目标的高级语言代码分离成硬件代码部分, 一个软件代码部分; 编译软件代码部分的主编译器; 包括主编译器的前端和中端以及HDL后端的HLL至HDL转换器; 执行编译软件代码部分的主要核心; 以及执行HDL代码的专用硬件。

    DATA TRANSMISSION METHOD IN PASSIVE COMMUNICATION SYSTEM
    8.
    发明申请
    DATA TRANSMISSION METHOD IN PASSIVE COMMUNICATION SYSTEM 有权
    无源通信系统中的数据传输方法

    公开(公告)号:US20130113611A1

    公开(公告)日:2013-05-09

    申请号:US13809792

    申请日:2011-01-24

    IPC分类号: H04Q5/22

    摘要: This invention relates to a data transmission method in a passive communication system being wirelessly powered up and being passively operable, without using its own power, for data transmission and reception, such as in a passive RFID (Radio Frequency IDentification) communication system, which is capable of effectively configuring a message transmitted by a passive device, thereby providing improved transmission efficiency.

    摘要翻译: 本发明涉及一种无源通信系统中的无线通信系统中的数据传输方法,该无线通信系统在无需使用自身功率的情况下被无源地加电并被动地进行数据传输和接收,例如在无源RFID(射频识别)通信系统中, 能够有效地配置由无源装置发送的消息,从而提供改善的传输效率。

    System and method for translating high programming level languages code into hardware description language code
    9.
    发明授权
    System and method for translating high programming level languages code into hardware description language code 有权
    将高编程级语言代码翻译成硬件描述语言代码的系统和方法

    公开(公告)号:US08336036B2

    公开(公告)日:2012-12-18

    申请号:US12392463

    申请日:2009-02-25

    IPC分类号: G06F9/45

    CPC分类号: G06F8/447 G06F8/51

    摘要: The present invention is directed to a method and system for translating a high programming level language code such as C, C++, Fortran, Java or the like into a HDL code such as Verilog or VHDL. The system includes: a C-to-C source translator which reads user API from a translation-targeted high level language code marked with the user API, separates the translation-targeted high level language code into a hardware code part and a software code part, and stores the hardware code part and the software code part in separate files; a main compiler which compiles the stored software code part; a translator which translates the stored hardware code part into a HDL code including one or more block modules and one top module; a main core which executes the compiled software code part; and a dedicated hardware which executes the HDL code.

    摘要翻译: 本发明涉及用于将诸如C,C ++,Fortran,Java等的高编程级语言代码转换成诸如Verilog或VHDL的HDL代码的方法和系统。 该系统包括:C-C源翻译器,其从由用户API标记的面向翻译的高级语言代码读取用户API,将翻译目标的高级语言代码分离成硬件代码部分和软件代码部分 并将硬件代码部分和软件代码部分存储在单独的文件中; 编译存储的软件代码部分的主编译器; 翻译器,将所存储的硬件代码部分转换成包括一个或多个块模块和一个顶部模块的HDL代码; 执行编译软件代码部分的主要核心; 以及执行HDL代码的专用硬件。

    System and Method for translating high programming level languages code into Hardware Description Language code
    10.
    发明申请
    System and Method for translating high programming level languages code into Hardware Description Language code 有权
    将高编程级语言代码转换为硬件描述语言代码的系统和方法

    公开(公告)号:US20100131933A1

    公开(公告)日:2010-05-27

    申请号:US12392463

    申请日:2009-02-25

    IPC分类号: G06F9/45

    CPC分类号: G06F8/447 G06F8/51

    摘要: The present invention is directed to a method and system for translating a high programming level language code such as C, C++, Fortran, Java or the like into a HDL code such as Verilog or VHDL. The system includes: a C-to-C source translator which reads user API from a translation-targeted high level language code marked with the user API, separates the translation-targeted high level language code into a hardware code part and a software code part, and stores the hardware code part and the software code part in separate files; a main compiler which compiles the stored software code part; a translator which translates the stored hardware code part into a HDL code including one or more block modules and one top module; a main core which executes the compiled software code part; and a dedicated hardware which executes the HDL code.

    摘要翻译: 本发明涉及用于将诸如C,C ++,Fortran,Java等的高编程级语言代码转换成诸如Verilog或VHDL的HDL代码的方法和系统。 该系统包括:C-C源翻译器,其从由用户API标记的面向翻译的高级语言代码读取用户API,将翻译目标的高级语言代码分离成硬件代码部分和软件代码部分 并将硬件代码部分和软件代码部分存储在单独的文件中; 编译存储的软件代码部分的主编译器; 翻译器,将所存储的硬件代码部分转换成包括一个或多个块模块和一个顶部模块的HDL代码; 执行编译软件代码部分的主要核心; 以及执行HDL代码的专用硬件。