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公开(公告)号：US20230096725A1
公开(公告)日：2023-03-30
申请号：US17951589
申请日：2022-09-23
发明人： Bing Wu
IPC分类号： H01L29/78 , H01L29/10 , H01L29/40 , H01L21/311 , H01L21/265 , H01L21/3213 , H01L29/66
摘要： An LDMOS device and a fabrication method for fabricating the same are provided. The LDMOS device includes: a substrate, which is of a first dopant type; an epitaxial layer, which is of the first dopant type and formed on the substrate; a gate structure disposed on an upper surface of the epitaxial layer; a well region of the first dopant type and a drift region of a second dopant type, both disposed in the epitaxial layer; a source region of the second dopant type, disposed within the well region; a drain region of the first dopant type, disposed within the drift region; a first insulating layer covering an upper surface and two sidewalls of the gate structure and the upper surface of the epitaxial layer; and a first conducting channel extending through the first insulating layer, source region and epitaxial layer, in contact the source region.
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公开(公告)号：US20220130981A1
公开(公告)日：2022-04-28
申请号：US17508251
申请日：2021-10-22
发明人： Jiakun Wang , Bing Wu
IPC分类号： H01L29/66 , H01L29/78 , H01L29/10 , H01L29/40 , H01L21/765
摘要： A LDMOS transistor and manufacturing method includes: forming an epitaxial layer on a substrate of a first doping type; forming a gate structure on an upper surface of the epitaxial layer; forming a source region of a second doping type in the epitaxial layer, the second doping type is opposite to the first doping type; forming a patterned first insulating layer on the upper surface of the epitaxial layer and the gate structure, and at least exposes part of the source region; forming a first conductive channel by using a sidewall as a mask, the first conductive channel extends from the source region to an upper surface of the substrate so as to connect the source region with the substrate; and forming a drain region of the second doping type in the epitaxial layer.
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公开(公告)号：US20230065526A1
公开(公告)日：2023-03-02
申请号：US17887573
申请日：2022-08-15
发明人： Jiakun Wang , Bing Wu
IPC分类号： H01L29/66 , H01L29/10 , H01L29/40 , H01L29/78 , H01L21/265 , H01L21/266
摘要： Disclosed is a split-gate power MOS device and a manufacturing method thereof. The method comprises: forming a trench in an epitaxial layer on a substrate; forming a first insulation layer on a surface of the epitaxial layer and in the trench; filling a cavity with polycrystalline silicon, performing back-etching; performing spin-coating on the first gate conductor layer to form a second insulation layer; forming a mask on the second insulation layer, removing a portion of the first insulation layer, to expose an upper portion of the trench; forming a gate oxide layer on a sidewall of the upper portion of the trench and the surface of the epitaxial layer; and forming a second gate conductor layer in the upper portion of the trench. According to the present disclosure, voltage withstand and electric leakage between the first gate conductor layer and the second gate conductor layer are reduced.
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公开(公告)号：US20220181484A1
公开(公告)日：2022-06-09
申请号：US17542610
申请日：2021-12-06
发明人： Bing Wu , Jiakun Wang
IPC分类号： H01L29/78 , H01L29/10 , H01L29/40 , H01L21/765 , H01L29/66
摘要： Disclosed is a trench-type MOSFET and a method for manufacturing the same. The method comprises: forming a trench in a semiconductor substrate; forming a first insulating layer and a shielding conductor in the trench; forming an opening on two sides of the shielding conductor in the trench, wherein the opening is separated from the shielding conductor by the first insulating layer; forming a gate dielectric layer and a gate conductor in the opening, wherein the trench extends from an upper surface of the semiconductor substrate into the semiconductor substrate, the first insulating layer covers a sidewall and a bottom of the trench and separates the shielding conductor from the semiconductor substrate, the gate dielectric layer at least covers a sidewall of the opening. The method simplifies the process steps of forming the trench-type MOSFET compared with the prior art, and reduces process errors.
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公开(公告)号：US11757035B2
公开(公告)日：2023-09-12
申请号：US17735899
申请日：2022-05-03
发明人： Bing Wu , Chien Ling Chan , Liang Tong
IPC分类号： H01L21/308 , H01L29/78 , H01L29/66 , H01L29/10 , H01L29/40 , H01L29/08 , H01L21/265 , H01L21/3213 , H01L29/417 , H01L29/06 , H01L21/266
CPC分类号： H01L29/7816 , H01L21/266 , H01L21/26513 , H01L21/308 , H01L21/32139 , H01L29/0653 , H01L29/0865 , H01L29/0882 , H01L29/1087 , H01L29/1095 , H01L29/401 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L29/66659 , H01L29/66681 , H01L29/7835
摘要： An LDMOS transistor and a method for manufacturing the same are provided. The method includes: forming an epitaxial layer on a substrate, forming a gate structure on an upper surface of the epitaxial layer, forming a body region and a drift region in the epitaxial layer, forming a source region in the body region, forming a first insulating layer on the gate structure and an upper surface of the epitaxial layer and, forming a shield conductor layer on the first insulating layer, forming a second insulating layer covering the shield conductor layer, forming a first conductive path, to connect the source region with the substrate, and forming a drain region in the drift region. By forming the first conductive path which connects the source region with the substrate, the size of the LDMOS transistor and the resistance can be reduced.
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公开(公告)号：US11670502B2
公开(公告)日：2023-06-06
申请号：US17235103
申请日：2021-04-20
发明人： Jiakun Wang , Hui Chen , Bing Wu
IPC分类号： H01L21/02 , H01L29/16 , H01L21/8234
CPC分类号： H01L21/02271 , H01L21/0223 , H01L21/02592 , H01L21/02595 , H01L21/823468 , H01L29/1608
摘要： A method of making a silicon carbide MOSFET device can include: providing a substrate with a first doping type; forming a patterned first barrier layer on a first surface of the substrate; forming a source region with a first doping type in the substrate; forming a base region with a second doping type and a contact region with a second doping type in the substrate, and forming a gate structure. The first barrier layer can include a first portion and a second portion, the first portion can include a semiconductor layer and a removable layer different from the semiconductor layer, and the second portion can only include the removable layer.
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公开(公告)号：US11355631B2
公开(公告)日：2022-06-07
申请号：US16247007
申请日：2019-01-14
发明人： Bing Wu , Chien Ling Chan , Liang Tong
IPC分类号： H01L29/78 , H01L29/66 , H01L29/10 , H01L29/40 , H01L29/08 , H01L21/265 , H01L21/3213 , H01L21/308 , H01L29/417 , H01L29/06 , H01L21/266
摘要： An LDMOS transistor and a method for manufacturing the same are provided. The method includes: forming an epitaxial layer on a substrate, forming a gate structure on an upper surface of the epitaxial layer, forming a body region and a drift region in the epitaxial layer, forming a source region in the body region, forming a first insulating layer on the gate structure and an upper surface of the epitaxial layer and, forming a shield conductor layer on the first insulating layer, forming a second insulating layer covering the shield conductor layer, forming a first conductive path, to connect the source region with the substrate, and forming a drain region in the drift region. By forming the first conductive path which connects the source region with the substrate, the size of the LDMOS transistor and the resistance can be reduced.
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公开(公告)号：US11424344B2
公开(公告)日：2022-08-23
申请号：US17091225
申请日：2020-11-06
发明人： Jiakun Wang , Bing Wu
IPC分类号： H01L29/423 , H01L29/66 , H01L21/308 , H01L29/78
摘要： A method of manufacturing a trench MOSFET can include: forming a trench extending from an upper surface of a semiconductor base layer to internal portion of the semiconductor base layer; forming a first insulating layer covering sidewall and bottom surfaces of the trench and the upper surface of the semiconductor base layer; forming a shield conductor filling a lower portion of the trench, where the first insulating layer separates the shield conductor from the semiconductor base layer; forming a second insulating layer covering a top surface of the shield conductor, where the first insulating layer separates the second insulating layer from the semiconductor base layer, and the first and second insulating layers conformally form a dielectric layer; and removing the dielectric layer located on the upper surface of the semiconductor base layer and located on the upper sidewall surface of the trench.
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公开(公告)号：US20220262947A1
公开(公告)日：2022-08-18
申请号：US17735899
申请日：2022-05-03
发明人： Bing Wu , Chien Ling Chan , Liang Tong
IPC分类号： H01L29/78 , H01L29/66 , H01L29/10 , H01L29/40 , H01L29/08 , H01L21/265 , H01L21/3213 , H01L21/308 , H01L29/417 , H01L29/06 , H01L21/266
摘要： An LDMOS transistor and a method for manufacturing the same are provided. The method includes: forming an epitaxial layer on a substrate, forming a gate structure on an upper surface of the epitaxial layer, forming a body region and a drift region in the epitaxial layer, forming a source region in the body region, forming a first insulating layer on the gate structure and an upper surface of the epitaxial layer and, forming a shield conductor layer on the first insulating layer, forming a second insulating layer covering the shield conductor layer, forming a first conductive path, to connect the source region with the substrate, and forming a drain region in the drift region. By forming the first conductive path which connects the source region with the substrate, the size of the LDMOS transistor and the resistance can be reduced.
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