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公开(公告)号：US06611910B2
公开(公告)日：2003-08-26
申请号：US09169868
申请日：1998-10-12
申请人： Harshvardhan Sharangpani , Tse-Yu Yeh , Michael Paul Corwin , Millind Mittal , Kent G. Fielden , Dale Morris , Rajiv Gupta , Michael Schlansker , Mircea Poplingher
发明人： Harshvardhan Sharangpani , Tse-Yu Yeh , Michael Paul Corwin , Millind Mittal , Kent G. Fielden , Dale Morris , Rajiv Gupta , Michael Schlansker , Mircea Poplingher
IPC分类号： G06F930
CPC分类号： G06F9/3806 , G06F9/322 , G06F9/325 , G06F9/3844 , G06F9/3846
摘要： A branch operation is processed using a branch predict instruction and an associated branch instruction. The branch predict instruction indicates a predicted direction, a target address, and an instruction address for the associated branch instruction. When the branch predict instruction is detected, the target address is stored at an entry indicated by the associated branch instruction address and a prefetch request is triggered to the target address. The branch predict instruction may also include hint information for managing the storage and use of the branch prediction information.
摘要翻译： 使用分支预测指令和相关联的分支指令来处理分支操作。 分支预测指示指示相关联的分支指令的预测方向，目标地址和指令地址。 当检测到分支预测指令时，目标地址被存储在由关联的分支指令地址指示的条目上，并且预取请求被触发到目标地址。 分支预测指令还可以包括用于管理分支预测信息的存储和使用的提示信息。
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公开(公告)号：US20050066153A1
公开(公告)日：2005-03-24
申请号：US10461782
申请日：2003-06-12
申请人： Harshvardhan Sharangpani , Tse-Yu Yeh , Michael Paul Corwin , Millind Mittal , Kent Fielden , Dale Morris , Rajiv Gupta , Michael Schlansker , Mircea Poplingher
发明人： Harshvardhan Sharangpani , Tse-Yu Yeh , Michael Paul Corwin , Millind Mittal , Kent Fielden , Dale Morris , Rajiv Gupta , Michael Schlansker , Mircea Poplingher
CPC分类号： G06F9/3806 , G06F9/322 , G06F9/325 , G06F9/3844 , G06F9/3846
摘要： A branch operation is processed using a branch predict instruction and an associated branch instruction. The branch predict instruction indicates a predicted direction, a target address, and an instruction address for the associated branch instruction. When the branch predict instruction is detected, the target address is stored at an entry indicated by the associated branch instruction address and a prefetch request is triggered to the target address. The branch predict instruction may also include hint information for managing the storage and use of the branch prediction information.
摘要翻译： 使用分支预测指令和相关联的分支指令来处理分支操作。 分支预测指示指示相关联的分支指令的预测方向，目标地址和指令地址。 当检测到分支预测指令时，目标地址被存储在由关联的分支指令地址指示的条目上，并且预取请求被触发到目标地址。 分支预测指令还可以包括用于管理分支预测信息的存储和使用的提示信息。
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3.发明授权公开(公告)号：US06237077B1
公开(公告)日：2001-05-22
申请号：US08949277
申请日：1997-10-13
申请人： Harshvardhan Sharangpani , Michael Paul Corwin , Dale Morris , Kent Fielden , Tse-Yu Yeh , Hans Mulder , James Hull
发明人： Harshvardhan Sharangpani , Michael Paul Corwin , Dale Morris , Kent Fielden , Tse-Yu Yeh , Hans Mulder , James Hull
IPC分类号： G06F938
CPC分类号： G06F9/3885 , G06F9/3853 , G06F9/3861
摘要： A method for processing one or more branch instructions in an instruction bundle is provided. The instructions are ordered in an execution sequence within the bundle, with the branch instructions ordered last in the sequence. The bundled instructions are transferred to execution units indicated by a template field that is associated with the bundle. The first branch instruction in the bundle's execution sequence that is resolved taken is determined, and retirement of subsequent instructions in the execution sequence is suppressed.
摘要翻译： 提供了一种用于处理指令束中的一个或多个分支指令的方法。 指令以捆绑中的执行顺序排序，分支指令在序列中最后排列。 捆绑的指令被传送到与捆绑相关联的模板字段指示的执行单元。 确定已解决的束的执行序列中的第一个分支指令，并且抑制执行序列中后续指令的退出。
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4.发明授权公开(公告)号：US06240510B1
公开(公告)日：2001-05-29
申请号：US09130387
申请日：1998-08-06
IPC分类号： G06F915
CPC分类号： G06F9/3885 , G06F9/30094 , G06F9/325 , G06F9/3806 , G06F9/3844
摘要： A system is provided for processing concurrently one or more branch instructions in an instruction bundle. The system includes multiple branch execution pipelines, each capable of executing a branch instruction to determine a branch direction, target address, and any side effects. Linking logic receives the resolved branch information and identifies a first branch instruction in execution order for which the branch direction is taken.
摘要翻译： 提供一种用于同时处理指令束中的一个或多个分支指令的系统。 该系统包括多个分支执行流水线，每个分支执行流水线能够执行分支指令以确定分支方向，目标地址和任何副作用。 链接逻辑接收解析的分支信息，并以执行分支方向的执行顺序识别第一分支指令。
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5.发明授权Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditions 有权通过比较预测和条件选择的暂定目标地址和分支条件的验证来验证群集中的分支的预测公开(公告)号：US06304960B1
公开(公告)日：2001-10-16
申请号：US09130380
申请日：1998-08-06
IPC分类号： G06F938
CPC分类号： G06F9/3885 , G06F9/30072 , G06F9/322 , G06F9/325 , G06F9/3806 , G06F9/3842 , G06F9/3844 , G06F9/3861
摘要： A system for validating branch predictions for clusters of branch instructions includes an address validation module and a condition validation module. The address validation module determines target addresses for the branches in the cluster. One of the determined target addresses is selected, using predicted branch directions. The selected target address is compared with a predicted target address, and resolved branch directions are compared with predicted branch directions. A misprediction is indicated if either comparison fails.
摘要翻译： 用于验证分支指令簇的分支预测的系统包括地址验证模块和条件验证模块。 地址验证模块确定集群中分支的目标地址。 使用预测的分支方向选择确定的目标地址之一。 将所选择的目标地址与预测的目标地址进行比较，并将分辨的分支方向与预测的分支方向进行比较。 如果比较失败，则会显示错误预测。
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6.发明申请METHODS AND SYSTEMS FOR HARDWARE ACCELERATION OF STREAMED DATABASE OPERATIONS AND QUERIES BASED ON MULTIPLE HARDWARE ACCELERATORS 有权基于多个硬件加速器的流水线数据库操作和查询的硬件加速方法与系统公开(公告)号：US20120047126A1
公开(公告)日：2012-02-23
申请号：US13172792
申请日：2011-06-29
IPC分类号： G06F17/30
CPC分类号： G06F17/30519
摘要： Embodiments of the present invention provide a hardware accelerator that assists a host database system in processing its queries. The hardware accelerator comprises special purpose processing elements that are capable of receiving database query/operation tasks in the form of machine code database instructions, execute them in hardware without software, and return the query/operation result back to the host system.
摘要翻译： 本发明的实施例提供了一种辅助主机数据库系统处理其查询的硬件加速器。 硬件加速器包括能够以机器码数据库指令的形式接收数据库查询/操作任务的专用处理元件，无需软件执行硬件，并将查询/运算结果返回主机系统。
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公开(公告)号：US10803066B2
公开(公告)日：2020-10-13
申请号：US13172799
申请日：2011-06-29
申请人： James Shau , Jeremy L. Branscome , Krishnan Meiyyappan , Hung Viet Tran , Alan Lee Beck , Robert Hou , Michael Paul Corwin , Joseph Irawan Chamdani
发明人： James Shau , Jeremy L. Branscome , Krishnan Meiyyappan , Hung Viet Tran , Alan Lee Beck , Robert Hou , Michael Paul Corwin , Joseph Irawan Chamdani
IPC分类号： G06F17/30 , G06F16/245
摘要： Embodiments of the present invention provide a hardware accelerator that assists a host database system in processing its queries. The hardware accelerator comprises special purpose processing elements that are capable of receiving database query/operation tasks in the form of machine code database instructions, execute them in hardware without software, and return the query/operation result back to the host system.
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8.发明授权Methods and systems for hardware acceleration of streamed database operations and queries based on multiple hardware accelerators 有权基于多个硬件加速器的流数据库操作和查询的硬件加速方法和系统公开(公告)号：US09141670B2
公开(公告)日：2015-09-22
申请号：US13172792
申请日：2011-06-29
IPC分类号： G06F17/30
CPC分类号： G06F17/30519
摘要： Embodiments of the present invention provide a hardware accelerator that assists a host database system in processing its queries. The hardware accelerator comprises special purpose processing elements that are capable of receiving database query/operation tasks in the form of machine code database instructions, execute them in hardware without software, and return the query/operation result back to the host system.
摘要翻译： 本发明的实施例提供了一种辅助主机数据库系统处理其查询的硬件加速器。 硬件加速器包括能够以机器码数据库指令的形式接收数据库查询/操作任务的专用处理元件，无需软件执行硬件，并将查询/运算结果返回主机系统。
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9.发明申请METHODS AND SYSTEMS FOR HARDWARE ACCELERATION OF DATABASE OPERATIONS AND QUERIES FOR A VERSIONED DATABASE BASED ON MULTIPLE HARDWARE ACCELERATORS 审中-公开用于硬件加速数据库操作的方法和系统和基于多个硬件加速器的变体数据库的查询公开(公告)号：US20120117027A1
公开(公告)日：2012-05-10
申请号：US13172799
申请日：2011-06-29
申请人： James Shau , Jeremy L. Branscome , Krishnan Meiyappan , Hung Viet Tran , Alan Lee Beck , Robert Hou , Michael Paul Corwin , Joseph Irawan Chamdani
发明人： James Shau , Jeremy L. Branscome , Krishnan Meiyappan , Hung Viet Tran , Alan Lee Beck , Robert Hou , Michael Paul Corwin , Joseph Irawan Chamdani
IPC分类号： G06F7/00
摘要： Embodiments of the present invention provide a hardware accelerator that assists a host database system in processing its queries. The hardware accelerator comprises special purpose processing elements that are capable of receiving database query/operation tasks in the form of machine code database instructions, execute them in hardware without software, and return the query/operation result back to the host system.
摘要翻译： 本发明的实施例提供了一种辅助主机数据库系统处理其查询的硬件加速器。 硬件加速器包括能够以机器码数据库指令的形式接收数据库查询/操作任务的专用处理元件，无需软件执行硬件，并将查询/运算结果返回主机系统。
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公开(公告)号：US06438650B1
公开(公告)日：2002-08-20
申请号：US09216107
申请日：1998-12-16
申请人： Nhon T. Quach , Sunny Huang , Jeen Miin , Huang Kuang Hu , Stuart Sailer , Michael Paul Corwin
发明人： Nhon T. Quach , Sunny Huang , Jeen Miin , Huang Kuang Hu , Stuart Sailer , Michael Paul Corwin
IPC分类号： G06F1200
CPC分类号： G06F12/0859
摘要： A system for processing caches misses includes a request miss buffer, secondary miss logic, and a request identifier buffer. When a request misses in a cache, information characterizing the request is provided to the request miss buffer and the secondary miss logic. The secondary miss logic determines whether the request may be merged with a pending bus transaction, and provides the request identifier buffer with a pointer to the request information. The pointer is stored at an entry associated with the pending bus transaction. For a load request, data returned by the bus transaction is routed to a targeted register, using the request information in the request miss buffer.
摘要翻译： 用于处理高速缓存未命中的系统包括请求未命中缓冲器，次要错误逻辑和请求标识符缓冲器。 当请求在高速缓存中丢失时，表征请求的信息被提供给请求未命中缓冲器和辅助错误逻辑。 次要错误逻辑确定请求是否可以与未决总线事务合并，并且向请求标识符缓冲器提供指向请求信息的指针。 指针存储在与未决总线事务相关联的条目中。 对于加载请求，总线事务返回的数据使用请求丢失缓冲区中的请求信息路由到目标寄存器。
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