公开(公告)号：US5473173A

公开(公告)日：1995-12-05

申请号：US245314

申请日：1994-05-18

申请人： Haruhisa Takiguchi ,  Kousei Takahashi ,  Martin D. Dawson ,  Geoffrey Duggan

发明人： Haruhisa Takiguchi ,  Kousei Takahashi ,  Martin D. Dawson ,  Geoffrey Duggan

IPC分类号： H01L21/20 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y40/00 ,  H01S5/00 ,  H01S5/34 ,  H01S5/343 ,  H01L27/14 ,  H01L29/205 ,  H01L31/04

CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01S5/34 ,  H01S5/3403

摘要： A quantum well structure is provided which is capable of efficiently confining electrons and holes in a quantum well layer. The quantum well structure includes a first cladding layer, a second cladding layer, and a plurality of quantum well layers and one or more barrier layers each disposed between the first cladding layer and the second cladding layer. The quantum well layers and the barrier layers are laminated in an alternating manner. The quantum well layers include at least two selected from the group consisting of a layer having tensile strain, a layer having no strain, and a layer having compressive strain. The thickness of each of the quantum well layers is selected so that the energy difference in each of the quantum well layers between the ground quantum state of an electron at the conduction band and the ground quantum state of a hole at the valence band is substantially the same.

摘要翻译： 提供了能够有效地限制量子阱层中的电子和空穴的量子阱结构。 量子阱结构包括第一覆层，第二覆层和多个量子阱层以及一个或多个阻挡层，每个势垒层设置在第一覆层和第二覆层之间。 量子阱层和阻挡层以交替的方式层叠。 量子阱层包括选自具有拉伸应变的层，不具有应变的层和具有压应变的层的至少两个。 选择每个量子阱层的厚度，使得在导带处的电子的基准量子态与价带的空穴的基准量子态之间的每个量子阱层中的能量差基本上是 相同。

公开(公告)号：US5571376A

公开(公告)日：1996-11-05

申请号：US404508

申请日：1995-03-15

申请人： Timothy D. Bestwick ,  Alistair H. Kean ,  Martin D. Dawson ,  Geoffrey Duggan

发明人： Timothy D. Bestwick ,  Alistair H. Kean ,  Martin D. Dawson ,  Geoffrey Duggan

IPC分类号： H01L29/06 ,  H01L21/335 ,  H01L29/12 ,  H01L29/66 ,  H01L31/10 ,  H01S5/00 ,  H01S5/34 ,  H01L21/31

CPC分类号： B82Y10/00 ,  H01L29/125 ,  H01L29/127 ,  H01L29/66469 ,  Y10S438/962

摘要： A quantum confined device is provided having raised portions formed on opposing walls of a groove, thereby defining a region of reduced width in the vicinity of the intersection of the walls. During fabrication, a "V" groove is formed in a substrate and then further masking and etching steps are performed on the walls of the groove to form the raised portions. Quantum confined devices can be formed within the groove by epitaxial deposition of semiconducting layers into the region of reduced width.

摘要翻译： 提供了一种量子限制装置，其具有形成在槽的相对壁上的凸起部分，从而限定了在壁的相交附近附近的宽度减小的区域。 在制造过程中，在衬底中形成“V”槽，然后在槽的壁上执行进一步的掩模和蚀刻步骤以形成凸起部分。 可以通过将半导体层外延沉积到减小宽度的区域中而在沟内形成量子限制的器件。