GATED NANOROD FIELD EMITTER STRUCTURES AND ASSOCIATED METHODS OF FABRICATION
    3.
    发明申请
    GATED NANOROD FIELD EMITTER STRUCTURES AND ASSOCIATED METHODS OF FABRICATION 有权
    GATED NANOROD场发射器结构和相关的制造方法

    公开(公告)号:US20070273263A1

    公开(公告)日:2007-11-29

    申请号:US11835691

    申请日:2007-08-08

    IPC分类号: H01J1/02

    CPC分类号: H01J1/304 H01J9/025

    摘要: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.

    摘要翻译: 本发明涉及门控纳米棒场发射器件,其中这种器件具有相对较小的发射极尖对栅极距离,从而提供相对高的发射极尖端密度和低导通电压。 这种方法采用传统的器件处理技术(光刻,蚀刻等)与纳米棒的电化学沉积的组合。 这些方法相对简单,成本效益高,效率高; 并且它们提供适用于X射线成像应用,照明应用,平板场发射显示(FED)应用等的场致发射器件。

    Gated nanorod field emitters
    5.
    发明申请
    Gated nanorod field emitters 审中-公开
    门控纳米棒场发射器

    公开(公告)号:US20070247048A1

    公开(公告)日:2007-10-25

    申请号:US11234023

    申请日:2005-09-23

    IPC分类号: H01J1/00 H01J9/00

    摘要: In a method of making a field emitter, at least one post (120) is formed on a semiconductor substrate (110). The post (120) extends upwardly from the substrate (110). The post (120) is monocrystalline with the substrate (110). A dielectric layer (130) is deposited on the substrate (110). The dielectric layer (130) defines a via (132) therethrough about the post (120). A conductive gate layer (140) is applied to the dielectric layer (130) so that the conductive gate layer (140) defines an opening that is juxtaposed with the via (132). At least one nanostructure (150) is grown upwardly from the top surface of the post (120).

    摘要翻译: 在制造场致发射体的方法中,至少一个柱(120)形成在半导体衬底(110)上。 柱(120)从衬底(110)向上延伸。 柱(120)与衬底(110)是单晶的。 介电层(130)沉积在衬底(110)上。 电介质层(130)限定通过其穿过柱(120)的通孔(132)。 导电栅极层(140)被施加到电介质层(130),使得导电栅极层(140)限定与通孔(132)并置的开口。 至少一个纳米结构(150)从柱(120)的顶表面向上生长。