公开(公告)号：US20050097341A1

公开(公告)日：2005-05-05

申请号：US10931210

申请日：2004-09-01

申请人： Hedley Francis ,  Ashley Stevens ,  Andrew Rose

发明人： Hedley Francis ,  Ashley Stevens ,  Andrew Rose

IPC分类号： G06F12/14 ,  G06F1/00 ,  G06F13/38 ,  G06F21/10 ,  G06F21/72 ,  G06F21/84 ,  H04L9/32

CPC分类号： G06F21/72 ,  G06F21/10 ,  G06F21/84 ,  G06F2221/0797 ,  G06F2221/2105

摘要： The present invention provides a data processing apparatus and method for merging secure and non-secure data. The apparatus comprises at least one processor operable to execute a non-secure process to produce non-secure data to be included in an output data stream, and to execute a secure process to produce secure data to be included in the output data stream. A non-secure buffer is provided for receiving the non-secure data produced by the non-secure process, and in addition a secure buffer is provided for receiving the secure data produced by the secure process, the secure buffer not being accessible by the non-secure process. An output controller is then arranged to read the non-secure data from the non-secure buffer and the secure data from the secure buffer, and to merge the non-secure data and the secure data in order to produce a combined data stream, the output data stream then being derivable from the combined data stream. It has been found that such an approach assists in improving the security of the secure data, and in reducing memory bandwidth requirements and the processing requirements of the processor.

摘要翻译： 本发明提供一种用于合并安全和非安全数据的数据处理装置和方法。 该装置包括至少一个处理器，可操作以执行非安全过程以产生要包括在输出数据流中的非安全数据，以及执行安全处理以产生要包括在输出数据流中的安全数据。 提供了一种非安全缓冲器，用于接收由非安全过程产生的非安全数据，另外还提供了一个安全缓冲器，用于接收由安全过程生成的安全数据，安全缓冲区不能被非安全性访问， 安全程序。 然后，输出控制器被安排为从非安全缓冲器读取非安全数据和来自安全缓冲器的安全数据，并且合并非安全数据和安全数据以产生组合数据流， 输出数据流然后可从组合数据流导出。 已经发现，这种方法有助于提高安全数据的安全性，并且在减少存储器带宽要求和处理器的处理要求方面有所帮助。

公开(公告)号：US20050216711A1

公开(公告)日：2005-09-29

申请号：US10807498

申请日：2004-03-24

申请人： David Butcher ,  Stephen Hill ,  Hedley Francis ,  Vladimir Vasekin ,  Andrew Rose

发明人： David Butcher ,  Stephen Hill ,  Hedley Francis ,  Vladimir Vasekin ,  Andrew Rose

IPC分类号： G06F9/00 ,  G06F9/318 ,  G06F9/355 ,  G06F9/38

CPC分类号： G06F9/3861 ,  G06F9/30174 ,  G06F9/355

摘要： A processor 6 is provided with an instruction decoder 18 which is responsive to memory access instructions to determine whether the base register value being used matches a null value and if such a match occurs then branches to a null value exception handler.

摘要翻译： 处理器6设置有指令解码器18，该指令解码器18响应于存储器访问指令来确定正在使用的基本寄存器值是否与空值匹配，并且如果发生这样的匹配，则分支到空值异常处理程序。

公开(公告)号：US20050010707A1

公开(公告)日：2005-01-13

申请号：US10788305

申请日：2004-03-01

申请人： Hedley Francis

发明人： Hedley Francis

IPC分类号： G06F9/48 ,  G06F9/46 ,  G06F13/26 ,  G06F13/28

CPC分类号： G06F13/26

摘要： A data processing apparatus and method for handling interrupts is provided, the apparatus having an interrupt controller operable to receive interrupts generated by a number of interrupt sources, and to determine based on predetermined criteria whether to output an interrupt request signal. A processing unit is provided which is operable upon receipt of the interrupt request signal to perform an interrupt service routine for a selected one of the received interrupts in order to generate an interrupt response for the corresponding interrupt source. Timer logic is also provided which is operable upon receipt of an interrupt generated by an associated interrupt source to produce a timing indication. As a result of this, the processing unit is operable, when performing the interrupt service routine for the interrupt generated by that associated interrupt source, to reference the timer logic in order to obtain the timing indication, and to control a predetermined aspect of the interrupt response in dependence on the timing indication. This has been found to provide a significantly improved technique for handling interrupts from interrupt sources which desire deterministic behaviour with regards to the interrupt response.

摘要翻译： 提供一种用于处理中断的数据处理装置和方法，该装置具有可操作以接收由多个中断源产生的中断的中断控制器，并且基于是否输出中断请求信号来确定。 提供处理单元，其在接收到中断请求信号时可操作，以对所接收的中断中的所选中断执行中断服务程序，以便产生相应的中断源的中断响应。 还提供定时器逻辑，其可在接收到由相关联的中断源产生的中断以产生定时指示时操作。 因此，处理单元在执行由相关联的中断源产生的中断的中断服务程序时可以参考定时器逻辑以获得定时指示，并且控制中断的预定方面 响应时间指示。 已经发现，这提供了一种用于处理来自中断源的中断的显着改进的技术，其要求关于中断响应的确定性行为。

公开(公告)号：US20060242517A1

公开(公告)日：2006-10-26

申请号：US11114236

申请日：2005-04-26

申请人： Christopher Pedley ,  Jonathan Callan ,  Hedley Francis

发明人： Christopher Pedley ,  Jonathan Callan ,  Hedley Francis

IPC分类号： G01R31/28

CPC分类号： G06F11/366 ,  G06F11/0757 ,  G06F11/3471

摘要： Monitoring logic 20 for monitoring a data processor 10 to detect if it is not operating as anticipated, the monitoring logic 20 comprising: a timer 27 operable to measure a predetermined time; detection logic 24; and control logic 22; wherein said detection logic is operable to detect a data or instruction access to at least one predetermined address and in response to not detecting said data or instruction access within said predetermined time, said control logic is operable to send a control signal to said data processor, said control signal controlling said data processor to perform a predetermined operation.

摘要翻译： 监控逻辑20，用于监视数据处理器10以检测其是否不按预期操作，监视逻辑20包括：定时器27，可操作以测量预定时间; 检测逻辑24; 和控制逻辑22; 其中所述检测逻辑可操作以检测对至少一个预定地址的数据或指令访问，并且响应于在所述预定时间内未检测到所述数据或指令访问，所述控制逻辑可操作以向所述数据处理器发送控制信号， 所述控制信号控制所述数据处理器执行预定的操作。

公开(公告)号：US20060036833A1

公开(公告)日：2006-02-16

申请号：US10527960

申请日：2003-10-06

申请人： Frederic Claude Piry ,  Dominic Symes ,  Hedley Francis

发明人： Frederic Claude Piry ,  Dominic Symes ,  Hedley Francis

IPC分类号： G06F9/30

CPC分类号： G06F9/30058 ,  G06F9/30189 ,  G06F9/3842 ,  G06F9/3861 ,  G06F9/3867 ,  G06F9/3875 ,  G06F21/71 ,  G06F21/75 ,  G06F21/755 ,  G06F2207/7219 ,  G06F2221/2123

摘要： A data processing system is provided with mechanisms such that when a data value is stored within a data register, further data values are stored within one or more further registers such that the total number of signal transitions from high to low and from low to high does not vary in dependence upon the data value being written or the previous data value.

摘要翻译： 数据处理系统具有这样的机制，即当数据值被存储在数据寄存器中时，另外的数据值存储在一个或多个另外的寄存器中，使得从高到低和从低到高的信号转换的总数量 不依赖于正在写入的数据值或先前的数据值而变化。

公开(公告)号：US20050050524A1

公开(公告)日：2005-03-03

申请号：US10647106

申请日：2003-08-25

申请人： Andrew Booker ,  Hedley Francis ,  Gareth Vaughan

发明人： Andrew Booker ,  Hedley Francis ,  Gareth Vaughan

IPC分类号： G06F9/44

CPC分类号： G06F11/3688 ,  G06F9/30072 ,  G06F9/3017

摘要： A method and apparatus for generating software test information is disclosed. The method comprises the steps of: a) generating, from a sequence of instructions, at least one of which includes a condition code, a corresponding sequence of generated instructions, for selected instructions having a condition code the corresponding generated instruction being a predetermined generated instruction having a corresponding condition code; b) executing, on a target processor, the sequence of generated instructions; and c) when during the step (b) the predetermined generated instruction is encountered, determining with reference to status information associated with the operation of the target processor whether the condition code of the predetermined generated instruction is satisfied and, if so, replacing the predetermined generated instruction with the corresponding instruction from the sequence of instructions so as to cause the corresponding instruction to be executed. Providing a condition code with the generated instruction reduces the time taken to determine whether that condition code is satisfied. This is because it is possible to make the determination without invoking a software handler routine and instead the faster target processor hardware can be used. Hence, the performance when generating software test information is significantly improved.

摘要翻译： 公开了一种用于生成软件测试信息的方法和装置。 该方法包括以下步骤：a）从指令序列中产生至少一个指令，其中至少一个包括条件代码，对于所选指令的相应序列，所述指令具有条件码，所述相应的生成指令是预定的生成指令 具有相应的条件代码; b）在目标处理器上执行生成的指令的序列; 以及c）当在步骤（b）期间，当遇到预定的生成指令时，参考与目标处理器的操作相关联的状态信息来确定是否满足预定的生成指令的条件代码，如果是的话， 使用来自指令序列的相应指令生成指令，以使得执行相应的指令。 用生成的指令提供条件代码减少了确定条件码是否满足所需的时间。 这是因为可以在不调用软件处理程序的情况下进行确定，而可以使用更快的目标处理器硬件。 因此，生成软件测试信息时的性能显着提高。