公开(公告)号：US06237046B1

公开(公告)日：2001-05-22

申请号：US09013532

申请日：1998-04-23

申请人： Hideaki Ohmura ,  Kazuma Takatsu ,  Wasako Fueda

发明人： Hideaki Ohmura ,  Kazuma Takatsu ,  Wasako Fueda

IPC分类号： G06F1300

CPC分类号： G06F11/1666 ,  G06F11/20 ,  G06F12/0866

摘要： When an input/output request of a channel adapter causes a mishit on a cache and a staging amount by a device adapter reaches a predetermined amount, the cache is set into a hit status and the channel adapter is reactivated. By receiving a hit response, the reactivated channel adapter executes an input and an output for the cache and the staging of the channel adapter in parallel. A defective/alternating track management table which corresponds to track data stored in a cache memory and has each of addresses of a defective track and an alternating track and flag information showing a link state between both of the defective track and the alternating track is provided for an input/output controller. For a retrieving request in which the defective track address is designated, the defective/alternating track management table is retrieved and the corresponding alternating track address is obtained, thereby judging the presence or absence of a registration of a hash table.

摘要翻译： 当通道适配器的输入/输出请求导致高速缓存上的错误，并且设备适配器的登台量达到预定量时，高速缓存被设置为命中状态，并且重新激活信道适配器。 通过接收命中响应，重新激活的通道适配器并行执行高速缓存的输入和输出以及通道适配器的分级。 提供对应于存储在高速缓冲存储器中的轨道数据并且具有缺陷轨道的每个地址和示出缺陷轨道和交替轨道之间的链路状态的交替轨迹和标志信息的缺陷/交替轨道管理表用于 输入/输出控制器。 对于指定缺陷轨道地址的检索请求，检索缺陷/交替轨道管理表，并获得相应的交替轨道地址，从而判断是否存在哈希表的注册。

公开(公告)号：US5761531A

公开(公告)日：1998-06-02

申请号：US664263

申请日：1996-06-07

申请人： Hideaki Ohmura ,  Kazuma Takatsu ,  Wasako Fueda

发明人： Hideaki Ohmura ,  Kazuma Takatsu ,  Wasako Fueda

IPC分类号： G06F11/20 ,  G06F12/08 ,  G06F13/10

CPC分类号： G06F11/1666 ,  G06F12/0866 ,  G06F11/20

摘要： When an input/output request of a channel adapter causes a mishit on a cache and a staging amount by a device adapter reaches a predetermined amount, the cache is set into a hit status and the channel adapter is reactivated. By receiving a hit response, the reactivated channel adapter executes an input and an output for the cache and the staging of the channel adapter in parallel. A defective/alternating track management table which corresponds to track data stored in a cache memory and has each of addresses of a defective track and an alternating track and flag information showing a link state between both of the defective track and the alternating track is provided for an input/output controller. For a retrieving request in which the defective track address is designated, the defective/alternating track management table is retrieved and the corresponding alternating track address is obtained, thereby judging the presence or absence of a registration of a hash table.

摘要翻译： 当通道适配器的输入/输出请求导致高速缓存上的错误，并且设备适配器的登台量达到预定量时，高速缓存被设置为命中状态，并且重新激活信道适配器。 通过接收命中响应，重新激活的通道适配器并行执行高速缓存的输入和输出以及通道适配器的分级。 提供对应于存储在高速缓冲存储器中的轨道数据并且具有缺陷轨道的每个地址以及示出缺陷轨道和交替轨道两者之间的链路状态的交替轨迹和标志信息的缺陷/交替轨迹管理表用于 输入/输出控制器。 对于指定缺陷轨道地址的检索请求，检索缺陷/交替轨道管理表，并且获得相应的交替轨道地址，从而判断散列表的登记是否存在。

公开(公告)号：US5724542A

公开(公告)日：1998-03-03

申请号：US303192

申请日：1994-09-08

申请人： Yuichi Taroda ,  Kazuma Takatsu ,  Sanae Kamakura ,  Nobukazu Kirigaya ,  Hideaki Ohmura

发明人： Yuichi Taroda ,  Kazuma Takatsu ,  Sanae Kamakura ,  Nobukazu Kirigaya ,  Hideaki Ohmura

IPC分类号： G06F3/06 ,  G06F12/08 ,  G06F13/10 ,  G11B20/12 ,  G11B21/08 ,  G11B27/10 ,  G11B27/32 ,  G11B5/09

CPC分类号： G06F3/0607 ,  G06F12/0866 ,  G06F3/0661 ,  G06F3/0676 ,  G11B21/083 ,  G11B27/105 ,  G11B27/329 ,  G11B20/1252

摘要： An ID portion indicating the corresponding relationship between the number of a record contained in an FBA block and the position of the record is provided at the beginning of the FBA block. When a seek command has been issued by a host apparatus in the CKD format, a device adapter obtains the FBA block number corresponding to the parameter value (CCHH) of a head positioning command and positions a head at the FBA block of this number. Next, the device adapter obtains the FBA block number corresponding to the parameter value (sector value) of a set-sector command, reads one CKD track of blocks from the FBA block designated by the FBA block number and develops these blocks in a cache memory. A channel adapter searches the cache memory for a commanded record by referring to the information in the ID portion.

摘要翻译： 指示在FBA块中包含的记录数与记录位置之间的对应关系的ID部分被提供在FBA块的开头。 当CKD格式的主机装置发出查询命令时，设备适配器获得与头定位命令的参数值（CCHH）相对应的FBA块号，并将头位置在该号码的FBA块上。 接下来，设备适配器获得与设置扇区命令的参数值（扇区值）对应的FBA块号，从由FBA块号指定的FBA块中读取块的一个CKD轨迹，并将这些块展开在高速缓冲存储器 。 信道适配器通过参考ID部分中的信息来搜索高速缓冲存储器中的命令记录。

公开(公告)号：US08321628B2

公开(公告)日：2012-11-27

申请号：US12790035

申请日：2010-05-28

申请人： Motohiro Sakai ,  Kazuma Takatsu

发明人： Motohiro Sakai ,  Kazuma Takatsu

IPC分类号： G06F12/00

CPC分类号： G06F11/2094 ,  G06F11/0727 ,  G06F11/0793 ,  G06F12/0866 ,  G06F2212/224

摘要： A storage system includes an interface processor for receiving a read or write request, a primary storage, a secondary storage, a storage control device and a temporary storage area for temporarily storing data for the primary storage in case that an access to the primary storage fails. The storage control device includes a controller for, in case that the access to the primary storage fails when the read request is received by the interface processor, determining whether the read requested data is stored on the temporary storage area, controlling to read the read requested data from the temporary storage area when the read requested data is stored on the temporary storage area, and controlling to read the read requested data from the secondary storage when the requested data is not stored on the temporary storage area.

摘要翻译： 存储系统包括用于接收读取或写入请求的接口处理器，主存储器，辅助存储器，存储控制设备和临时存储区域，用于在对主存储器的访问失败的情况下临时存储主存储器的数据 。 存储控制装置包括：控制器，用于当接口处理器接收到读取请求时对主存储器的访问失败，确定所读取的请求数据是否存储在临时存储区域上，控制读取请求的读取 当所请求的数据被存储在临时存储区域时，来自临时存储区域的数据，并且当所请求的数据未被存储在临时存储区域上时，控制从副存储器读取所请求的数据。

公开(公告)号：US20080022056A1

公开(公告)日：2008-01-24

申请号：US11603126

申请日：2006-11-22

申请人： Kazuma Takatsu ,  Motohiro Sakai ,  Akira Satou

发明人： Kazuma Takatsu ,  Motohiro Sakai ,  Akira Satou

IPC分类号： G06F13/00 ,  G06F12/00

CPC分类号： G06F11/1461 ,  G06F11/1456

摘要： In a data recording apparatus, a monitoring unit detects a VLU including an MRB that manages an area that has not been accessed for a specified time period based on a current time, a time management table, and a parameter table. From MRBs of the detected VLU, the monitoring unit selects a plurality of MRBs with an unaccessed time period equal to or more than the specified time period and equal to or less than a total time. The monitoring unit performs synchronization process for data in a primary storage managed by the selected MRBs at a time. During the synchronization process, a correction value is adjusted when there is a data conflict with another device.

摘要翻译： 在数据记录装置中，监视单元基于当前时间，时间管理表和参数表，检测包括管理在特定时间段内未被访问的区域的MRB的VLU。 从检测到的VLU的MRB中，监视单元选择具有等于或大于指定时间段并且等于或小于总时间的不成功时间段的多个MRB。 监视单元一次对所选择的MRB管理的主存储器中的数据执行同步处理。 在同步过程中，当与其他设备存在数据冲突时，调整校正值。

公开(公告)号：US07752405B2

公开(公告)日：2010-07-06

申请号：US11785898

申请日：2007-04-20

申请人： Motohiro Sakai ,  Kazuma Takatsu ,  Akira Satou

发明人： Motohiro Sakai ,  Kazuma Takatsu ,  Akira Satou

IPC分类号： G06F12/16

CPC分类号： G06F11/1456 ,  G06F3/061 ,  G06F3/0662

摘要： A data recording apparatus includes a determining unit that determines whether a storable area is present in the first storage device. The storable area is a combination of a plurality of empty areas having contiguous physical addresses with a total data volume larger than that of a volume of the data. When the determining unit determines that the storable area is present, a first storage unit stores the data in the storable area, and a second storage unit stores the data that has been stored by the first storage unit in the storable area as a lump into the second storage device.

摘要翻译： 数据记录装置包括确定单元，其确定第一存储装置中是否存在可存储区域。 可存储区域是具有连续物理地址的多个空区域的组合，总数据量大于数据量的总数据量。 当确定单元确定可存储区域存在时，第一存储单元将数据存储在可存储区域中，并且第二存储单元将第一存储单元已经存储在可存储区域中的数据一次存入到 第二存储设备。

公开(公告)号：US20070260835A1

公开(公告)日：2007-11-08

申请号：US11826453

申请日：2007-07-16

申请人： Kazuma Takatsu

发明人： Kazuma Takatsu

IPC分类号： G06F12/16

CPC分类号： G06F11/2094 ,  G06F11/1456 ,  G06F11/1469 ,  G06F11/1662 ,  G06F11/2069

摘要： A storage controlling device controlling a storage device having a secondary storage unit for backup and a primary storage unit including a plurality of storing units in a redundant configuration, comprises a unit determining whether a storing unit not in a redundant configuration exists within the primary storage unit and a unit disassembling one of the storing units in a redundant configuration within the primary storage unit, the data of the one of the storing units being saved in the secondary storage unit for backup, and executing a rebuilding process for a storing unit for which a degradation process has been executed by using the disassembled storing unit if the storing unit that is within the primary storage unit and for which the degradation process has been executed holds the latest data, and if the storing unit not in a redundant configuration does not exist within the primary storage unit.

摘要翻译： 一种存储控制装置，其控制具有用于备份的二次存储单元的存储装置和包括冗余配置中的多个存储单元的主存储单元，包括：确定在所述主存储单元内是否存在不是冗余配置的存储单元 以及在所述主存储单元中以冗余配置拆卸所述存储单元中的一个的单元，所述存储单元之一的数据被保存在所述辅助存储单元中用于备份，并且执行用于存储单元的重建处理， 如果主存储单元内的存储单元已经执行了降级处理并且已经执行了降级处理的退出处理已经通过使用拆卸的存储单元来执行，并且如果不是冗余配置的存储单元不存在 主存储单元。

公开(公告)号：US20050216660A1

公开(公告)日：2005-09-29

申请号：US11138278

申请日：2005-05-27

申请人： Akihito Kobayashi ,  Mikio Ito ,  Kazuma Takatsu ,  Koji Uchida ,  Hidejiro Daikokuya ,  Kazuhiko Ikeuchi

发明人： Akihito Kobayashi ,  Mikio Ito ,  Kazuma Takatsu ,  Koji Uchida ,  Hidejiro Daikokuya ,  Kazuhiko Ikeuchi

IPC分类号： G06F11/20 ,  G06F12/00 ,  G06F12/08

CPC分类号： G06F11/1666 ,  G06F11/20 ,  G06F11/201 ,  G06F11/2087 ,  G06F11/2089 ,  G06F12/0804 ,  G06F12/0866 ,  G06F2212/262 ,  G06F2212/283 ,  G06F2212/286

摘要： A RAID apparatus that at least duplicates identical data to store thus duplicated data, which, when an instruction of writing data is given, writes data to a local cache and to a mirror cache, and writes data of the local cache to a primary disk and writes data of the mirror cache to a secondary disk. When an instruction of reading out data is given, and specified data is retained in the caches, the RAID apparatus outputs valid data of the local cache or the mirror cache, while when specified data is not retained in the caches, the RAID apparatus outputs valid data of the primary disk or the secondary disk.

摘要翻译： 至少复制相同数据以存储这样的复制数据的RAID装置，当给出写入数据的指令时，将数据写入本地高速缓存和镜像高速缓存，并将本地高速缓存的数据写入主盘， 将镜像缓存的数据写入辅助磁盘。 当给出读出数据的指令并且指定的数据被保留在高速缓存中时，RAID装置输出本地高速缓存或镜像缓存的有效数据，而当指定的数据不保留在高速缓存中时，RAID装置输出有效的 主磁盘或副磁盘的数据。

公开(公告)号：US07159071B2

公开(公告)日：2007-01-02

申请号：US10788218

申请日：2004-02-26

申请人： Kazuhiko Ikeuchi ,  Mikio Ito ,  Hidejirou Daikokuya ,  Kazuma Takatsu ,  Katsuhiko Nagashima ,  Koji Uchida ,  Akihito Kobayashi

发明人： Kazuhiko Ikeuchi ,  Mikio Ito ,  Hidejirou Daikokuya ,  Kazuma Takatsu ,  Katsuhiko Nagashima ,  Koji Uchida ,  Akihito Kobayashi

IPC分类号： G06F12/00

CPC分类号： G06F3/0635 ,  G06F3/061 ,  G06F3/0689 ,  G06F2206/1012

摘要： A storage system prevents a time out error of the host I/O caused by a stagnation of command processing in the storage system for accessing a disk device according to the host I/O request and internal I/O request. In DTC, counters for managing the requests in-process for host I/Os (host read) and internal I/Os (pre-fetch, write back) individually are provided, and the number of processing requests to be issued to a virtual disk (RLU) is limited individually. By assigning priority to the host I/Os, the load balance of the host I/Os and internal I/Os can be controlled. For rebuild/copy back, a dedicated load control mechanism is disposed where the load adjustment between ordinary I/Os and rebuild/copy back is performed.

摘要翻译： 存储系统可以防止根据主机I / O请求和内部I / O请求访问磁盘设备的存储系统中的命令处理停滞所导致的主机I / O的超时错误。 在DTC中，提供了用于管理主机I / O（主机读取）的进程中的请求和内部I / O（预取，写回）的计数器，以及要发送到虚拟磁盘的处理请求数 （RLU）被单独限制。 通过为主机I / O分配优先级，可以控制主机I / O和内部I / O的负载平衡。 为了重建/复制，设置专用负载控制机构，其中执行普通I / O和重建/复制之间的负载调整。

公开(公告)号：US20050044300A1

公开(公告)日：2005-02-24

申请号：US10785118

申请日：2004-02-25

申请人： Osamu Kimura ,  Yuichi Ogawa ,  Terumasa Haneda ,  Akihito Kobayashi ,  Koji Uchida ,  Kazuma Takatsu ,  Katsuhiko Nagashima

发明人： Osamu Kimura ,  Yuichi Ogawa ,  Terumasa Haneda ,  Akihito Kobayashi ,  Koji Uchida ,  Kazuma Takatsu ,  Katsuhiko Nagashima

IPC分类号： G06F3/06 ,  G06F11/20 ,  G06F12/08 ,  G06F12/00

CPC分类号： G06F12/0868 ,  G06F11/2087 ,  G06F2212/286 ,  G06F2212/312

摘要： The present invention has been developed to carry out the dual-writing of data in cache memories at a higher speed through a single address designation for the improvement of processing performance. In the present invention, a host interface module produces addressing information for designating two written-in destinations, and a bridge module produces two transferred-to addresses and written-in addresses of the cache memories on the basis of the addressing information so that data to be written is transferred to two management modules corresponding to the two transferred-to addresses to be written at the written-in addresses of the cache memories of the management modules.

摘要翻译： 本发明已被开发为通过单个地址指定以更高的速度对高速缓冲存储器中的数据进行双重写入，以提高处理性能。 在本发明中，主机接口模块产生用于指定两个写入目的地的寻址信息，并且桥接模块基于寻址信息产生高速缓冲存储器的两个转移地址和写入地址，从而将数据 被写入被传送到两个管理模块，该管理模块对应于要写入管理模块的高速缓冲存储器的写入地址的两个传送地址。