DATA PROCESSOR AND CONTROL SYSTEM
    1.
    发明申请
    DATA PROCESSOR AND CONTROL SYSTEM 有权
    数据处理器和控制系统

    公开(公告)号:US20120260014A1

    公开(公告)日:2012-10-11

    申请号:US13527312

    申请日:2012-06-19

    IPC分类号: G06F13/24

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    摘要翻译: 提供了一种数据处理器和控制系统,其中采用了中断控制器和事件链路控制器。 事件链接控制器响应生成的事件信号以输出用于控制电路模块的操作开始的起始控制信号。 电路模块能够产生事件信号。 事件链路控制器根据由事件控制信息定义的事件信号和起始控制信号之间的对应关系生成启动控制信号。 事件信号和启动控制信号之间的链接可以由事件控制信息来规定。 因此,可以顺序地控制由这种链路规定的电路模块的操作。 该控制既不包括中断处理中的CPU保存和返回进程,也不需要在竞争中断请求中执行优先级控制。

    DATA PROCESSOR AND CONTROL SYSTEM

    公开(公告)号:US20120047301A1

    公开(公告)日:2012-02-23

    申请号:US13287016

    申请日:2011-11-01

    IPC分类号: G06F13/24

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    DATA PROCESSOR AND CONTROL SYSTEM
    3.
    发明申请
    DATA PROCESSOR AND CONTROL SYSTEM 有权
    数据处理器和控制系统

    公开(公告)号:US20080221708A1

    公开(公告)日:2008-09-11

    申请号:US12044667

    申请日:2008-03-07

    IPC分类号: G06F17/00

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    摘要翻译: 提供了一种数据处理器和控制系统,其中采用了中断控制器和事件链路控制器。 事件链接控制器响应生成的事件信号以输出用于控制电路模块的操作开始的起始控制信号。 电路模块能够产生事件信号。 事件链路控制器根据由事件控制信息定义的事件信号和起始控制信号之间的对应关系生成启动控制信号。 事件信号和启动控制信号之间的链接可以由事件控制信息来规定。 因此,可以顺序地控制由这种链路规定的电路模块的操作。 该控制既不包括中断处理中的CPU保存和返回进程,也不需要在竞争中断请求中执行优先级控制。

    Data processor and control system
    4.
    发明授权
    Data processor and control system 失效
    数据处理器和控制系统

    公开(公告)号:US08219731B2

    公开(公告)日:2012-07-10

    申请号:US13287016

    申请日:2011-11-01

    IPC分类号: G06F13/24 G06F3/00

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    摘要翻译: 提供了一种数据处理器和控制系统,其中采用了中断控制器和事件链路控制器。 事件链接控制器响应生成的事件信号以输出用于控制电路模块的操作开始的起始控制信号。 电路模块能够产生事件信号。 事件链路控制器根据由事件控制信息定义的事件信号和起始控制信号之间的对应关系生成启动控制信号。 事件信号和启动控制信号之间的链接可以由事件控制信息来规定。 因此,可以顺序地控制由这种链路规定的电路模块的操作。 该控制既不包括中断处理中的CPU保存和返回进程,也不需要在竞争中断请求中执行优先级控制。

    Data processor and control system

    公开(公告)号:US08489788B2

    公开(公告)日:2013-07-16

    申请号:US13527312

    申请日:2012-06-19

    IPC分类号: G06F13/24 G06F3/00

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    Data processor and control system
    6.
    发明授权
    Data processor and control system 有权
    数据处理器和控制系统

    公开(公告)号:US08074005B2

    公开(公告)日:2011-12-06

    申请号:US12886766

    申请日:2010-09-21

    IPC分类号: G06F13/24 G06F3/00

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    摘要翻译: 提供了一种数据处理器和控制系统,其中采用了中断控制器和事件链路控制器。 事件链接控制器响应生成的事件信号以输出用于控制电路模块的操作开始的起始控制信号。 电路模块能够产生事件信号。 事件链路控制器根据由事件控制信息定义的事件信号和起始控制信号之间的对应关系生成启动控制信号。 事件信号和启动控制信号之间的链接可以由事件控制信息来规定。 因此,可以顺序地控制由这种链路规定的电路模块的操作。 该控制既不包括中断处理中的CPU保存和返回进程,也不需要在竞争中断请求中执行优先级控制。

    Data processor and control system
    7.
    发明授权
    Data processor and control system 有权
    数据处理器和控制系统

    公开(公告)号:US07822899B2

    公开(公告)日:2010-10-26

    申请号:US12044667

    申请日:2008-03-07

    IPC分类号: G06F13/24 G06F3/00

    摘要: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

    摘要翻译: 提供了一种数据处理器和控制系统,其中采用了中断控制器和事件链路控制器。 事件链接控制器响应生成的事件信号以输出用于控制电路模块的操作开始的起始控制信号。 电路模块能够产生事件信号。 事件链路控制器根据由事件控制信息定义的事件信号和起始控制信号之间的对应关系生成启动控制信号。 事件信号和启动控制信号之间的链接可以由事件控制信息来规定。 因此,可以顺序地控制由这种链路规定的电路模块的操作。 该控制既不包括中断处理中的CPU保存和返回进程,也不需要在竞争中断请求中执行优先级控制。

    Semiconductor device and data processing system
    8.
    发明授权
    Semiconductor device and data processing system 失效
    半导体器件和数据处理系统

    公开(公告)号:US06820179B2

    公开(公告)日:2004-11-16

    申请号:US10000034

    申请日:2001-12-04

    IPC分类号: G06F1200

    摘要: A semiconductor device which has an internal circuit for performing a circuit operation corresponding to a signal inputted or outputted through an input/output interface circuit adapted to a serial bus. The semiconductor device has a non-volatile storage circuit for storing identification data. Internal identification data stored in the non-volatile storage circuit is compared with external identification data included in an input signal supplied through the serial bus by a comparator circuit. A control circuit is responsive to a match detecting signal generated by the comparator circuit to perform a circuit operation corresponding to an input signal subsequently supplied through the serial bus to change the internal identification data stored in the non-volatile storage circuit.

    摘要翻译: 一种半导体器件,具有内部电路,用于执行与通过适用于串行总线的输入/输出接口电路输入或输出的信号相对应的电路操作。 半导体器件具有用于存储识别数据的非易失性存储电路。 存储在非易失性存储电路中的内部识别数据与由比较器电路通过串行总线提供的输入信号中包含的外部识别数据进行比较。 控制电路响应由比较器电路产生的匹配检测信号,以执行与随后通过串行总线提供的输入信号相对应的电路操作,以改变存储在非易失性存储电路中的内部识别数据。