公开(公告)号：US20100100886A1

公开(公告)日：2010-04-22

申请号：US12529367

申请日：2008-02-05

申请人： Masamichi Takagi ,  Masayuki Mizuno ,  Hiroaki Inoue

发明人： Masamichi Takagi ,  Masayuki Mizuno ,  Hiroaki Inoue

IPC分类号： G06F9/50

CPC分类号： G06F9/5027 ,  G06F11/1428 ,  G06F11/3419 ,  G06F11/3433 ,  G06F2209/483 ,  G06F2209/501

摘要： Even if a multiprocessor includes an uneven performance core, an inoperative core or a core that does not satisfy such a performance as designed but if the contrivance of task allocation can satisfy the requirement of an application to be executed, the multiple processors are shipped. In a task group allocation method for allocating, to a processor having a plurality of cores, task groups included in an application for the processor to execute, a calculation section measures performances and disposition patterns of the cores, generates a restricting condition associating the measured performances and disposition patterns of the cores with information indicating whether the application can be executed, and, with reference to the restricting condition, reallocates to the cores, the task groups that have previously been allocated to the cores.

摘要翻译： 即使多处理器包括不均衡的性能核心，不能满足设计性能的不工作核心或核心，但如果任务分配的设计能够满足执行应用程序的要求，则会发送多个处理器。 在用于将具有多个核心的处理器分配给应用程序中的处理器执行的任务组的任务组分配方法中，计算部分测量核心的性能和配置模式，产生将测量性能 以及具有指示是否可以执行应用的信息的核心的配置模式，并且参考限制条件将已经分配给核心的任务组重新分配给核心。

公开(公告)号：US08429663B2

公开(公告)日：2013-04-23

申请号：US12529367

申请日：2008-02-05

申请人： Masamichi Takagi ,  Masayuki Mizuno ,  Hiroaki Inoue

发明人： Masamichi Takagi ,  Masayuki Mizuno ,  Hiroaki Inoue

IPC分类号： G06F9/50

CPC分类号： G06F9/5027 ,  G06F11/1428 ,  G06F11/3419 ,  G06F11/3433 ,  G06F2209/483 ,  G06F2209/501

摘要： Even if a multiprocessor includes an uneven performance core, an inoperative core or a core that does not satisfy such a performance as designed but if the contrivance of task allocation can satisfy the requirement of an application to be executed, the multiple processors are shipped. In a task group allocation method for allocating, to a processor having a plurality of cores, task groups included in an application for the processor to execute, a calculation section measures performances and disposition patterns of the cores, generates a restricting condition associating the measured performances and disposition patterns of the cores with information indicating whether the application can be executed, and, with reference to the restricting condition, reallocates to the cores, the task groups that have previously been allocated to the cores.

摘要翻译： 即使多处理器包括不均衡的性能核心，不能满足设计性能的不工作核心或核心，但是如果任务分配的设计能够满足执行应用程序的要求，则会发送多个处理器。 在用于将具有多个核心的处理器分配给应用程序中的处理器执行的任务组的任务组分配方法中，计算部分测量核心的性能和配置模式，产生将测量性能 以及具有指示是否可以执行应用的信息的核心的配置模式，并且参考限制条件将已经分配给核心的任务组重新分配给核心。

公开(公告)号：US08301936B2

公开(公告)日：2012-10-30

申请号：US12447524

申请日：2007-10-17

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F11/00

CPC分类号： G06F11/277

摘要： An apparatus for performing a screening test of a semiconductor integrated circuit is disclosed, the semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, and the processors being programmatically operable. The apparatus for performing a screening test of a semiconductor integrated circuit comprises: an instruction/data signal synchronization circuit for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and a trace comparison circuit for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information.

摘要翻译： 公开了一种用于执行半导体集成电路的屏蔽测试的装置，所述半导体集成电路包括多个处理器，每个处理器具有用于指令执行信息的输出信号，并且所述处理器可编程地可操作。 用于执行半导体集成电路的屏蔽测试的装置包括：指令/数据信号同步电路，用于将指令的提供同步到所述各个处理器并用于同步向所述各个处理器提供数据; 以及跟踪比较电路，用于比较从各个处理器输出的指令执行信息，以确定所述处理器中的任何一个是否输出了不同的指令执行信息。

公开(公告)号：US20090240980A1

公开(公告)日：2009-09-24

申请号：US12441289

申请日：2007-09-13

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F11/20

CPC分类号： G06F11/2043 ,  G06F11/2023 ,  G06F11/2025 ,  G06F11/203 ,  G06F11/2033 ,  G06F11/2035

摘要： An information processing device comprises a plurality of processing units on which OSs and execution environments operate, and shared peripheral devices shared by the plurality of processing units. The information processing device is provided with a failure concealing device for concealing a failure which has occurred in a processing unit. The failure concealing device determines a substitutional processing unit that will act as a substitute for a failed processing unit so that the OS and execution environment which have operated on the failed processing unit will operate on the substitutional processing unit, switches the OS and execution environment which have operated on the failed processing unit so that they will operate on the substitutional processing unit, and switches a shared resource used by the failed processing unit such that it is available to the substitutional processing unit.

摘要翻译： 信息处理装置包括操作系统和执行环境操作的多个处理单元以及由多个处理单元共享的共享外围设备。 信息处理装置设置有用于隐藏处理单元中发生的故障的故障隐藏装置。 故障隐藏装置决定将作为故障处理单元的替代物的替代处理单元，使得在故障处理单元上操作的OS和执行环境将在替代处理单元上操作，切换OS和执行环境， 在故障处理单元上操作，使得它们在替代处理单元上操作，并且切换由故障处理单元使用的共享资源，使得它可用于替代处理单元。

公开(公告)号：US08140912B2

公开(公告)日：2012-03-20

申请号：US12447512

申请日：2007-10-19

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F11/00

CPC分类号： G06F11/0721 ,  G06F11/0751 ,  G06F11/2236

摘要： A semiconductor integrated circuit comprising a processor having an output signal of instruction log information and being operable in a program in memory is disclosed. The semiconductor integrated circuit comprises trace determination circuit for comparing an instruction code that corresponds to the instruction log information from a processor with an instruction code that is read from the memory to detect faults.

摘要翻译： 公开了一种半导体集成电路，其包括具有指令日志信息的输出信号并且可在存储器中的程序中操作的处理器。 半导体集成电路包括跟踪确定电路，用于将来自处理器的与指令日志信息相对应的指令代码与从存储器读取的指令代码进行比较以检测故障。

公开(公告)号：US08108719B2

公开(公告)日：2012-01-31

申请号：US12441289

申请日：2007-09-13

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F11/00

CPC分类号： G06F11/2043 ,  G06F11/2023 ,  G06F11/2025 ,  G06F11/203 ,  G06F11/2033 ,  G06F11/2035

摘要： An information processing device comprises a plurality of processing units on which OSs and execution environments operate, and shared peripheral devices shared by the plurality of processing units. The information processing device is provided with a failure concealing device for concealing a failure which has occurred in a processing unit. The failure concealing device determines a substitutional processing unit that will act as a substitute for a failed processing unit so that the OS and execution environment which have operated on the failed processing unit will operate on the substitutional processing unit, switches the OS and execution environment which have operated on the failed processing unit so that they will operate on the substitutional processing unit, and switches a shared resource used by the failed processing unit such that it is available to the substitutional processing unit.

摘要翻译： 信息处理装置包括操作系统和执行环境操作的多个处理单元以及由多个处理单元共享的共享外围设备。 信息处理装置设置有用于隐藏处理单元中发生的故障的故障隐藏装置。 故障隐藏装置决定将作为故障处理单元的替代物的替代处理单元，使得在故障处理单元上操作的OS和执行环境将在替代处理单元上操作，切换OS和执行环境， 在故障处理单元上操作，使得它们在替代处理单元上操作，并且切换由故障处理单元使用的共享资源，使得它可用于替代处理单元。

公开(公告)号：US20100077259A1

公开(公告)日：2010-03-25

申请号：US12447524

申请日：2007-10-17

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F9/30 ,  G06F11/07

CPC分类号： G06F11/277

摘要： An apparatus for performing a screening test of a semiconductor integrated circuit is disclosed, the semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, and the processors being programmatically operable. The apparatus for performing a screening test of a semiconductor integrated circuit comprises: an instruction/data signal synchronization circuit for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and a trace comparison circuit for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information.

摘要翻译： 公开了一种用于执行半导体集成电路的屏蔽测试的装置，所述半导体集成电路包括多个处理器，每个处理器具有用于指令执行信息的输出信号，并且所述处理器可编程地可操作。 用于执行半导体集成电路的屏蔽测试的装置包括：指令/数据信号同步电路，用于将指令的提供同步到所述各个处理器并用于同步向所述各个处理器提供数据; 以及跟踪比较电路，用于比较从各个处理器输出的指令执行信息，以确定所述处理器中的任何一个是否输出了不同的指令执行信息。

公开(公告)号：US20100153784A1

公开(公告)日：2010-06-17

申请号：US12447512

申请日：2007-10-19

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F11/36 ,  G06F11/34

CPC分类号： G06F11/0721 ,  G06F11/0751 ,  G06F11/2236

摘要： A semiconductor integrated circuit comprising a processor having an output signal of instruction log information and being operable in a program in memory is disclosed. The semiconductor integrated circuit comprises trace determination circuit for comparing an instruction code that corresponds to the instruction log information from a processor with an instruction code that is read from the memory to detect faults.

摘要翻译： 公开了一种半导体集成电路，其包括具有指令日志信息的输出信号并且可在存储器中的程序中操作的处理器。 半导体集成电路包括跟踪确定电路，用于将来自处理器的与指令日志信息相对应的指令代码与从存储器读取的指令代码进行比较以检测故障。

公开(公告)号：US20090271594A1

公开(公告)日：2009-10-29

申请号：US12517986

申请日：2007-11-22

申请人： Hiroako Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

发明人： Hiroako Inoue ,  Masamichi Takagi ,  Masayuki Mizuno

IPC分类号： G06F9/302 ,  G06F9/30

CPC分类号： G06F9/5088 ,  G06F9/5094 ,  G06F2209/5022 ,  Y02D10/22

摘要： A damage control unit includes: a switching judgment unit to judge the CPU configuration which performs smoothing of the damage ratio, according to the damage ratio of the CPUs; and a switching unit to perform switching of I/O signals of all the CPUs. The switching judgment unit observes the damage ratio calculated from values such as the temperature, voltage, current consumption amount, operation ratio, the number of accesses to the resources in the CPU, at all times or at some extent of time intervals and notifies the switching unit of the CPU configuration to be changed by using the calculation method for smoothing the damage ratio of each CPU. The switching unit makes a connection to the I/O signals of all the CPUs and a system bus and switches the I/O signal of the CPU to be switched according to the notification from the switching judgment unit.

摘要翻译： 损伤控制单元包括：切换判断单元，用于根据CPU的损坏比来判断进行损伤比平滑化的CPU结构; 以及用于执行所有CPU的I / O信号的切换的切换单元。 切换判断单元在所有时间或在某个时间间隔内观察由诸如温度，电压，电流消耗量，操作比率，CPU中资源的访问次数等值计算的损坏率，并通知切换 通过使用用于平滑每个CPU的损坏比的计算方法来更改CPU配置的单位。 切换单元连接到所有CPU的I / O信号和系统总线，并根据来自切换判断单元的通知切换要切换的CPU的I / O信号。

公开(公告)号：US08862934B2

公开(公告)日：2014-10-14

申请号：US13510621

申请日：2010-11-26

申请人： Yoshio Kameda ,  Masayuki Mizuno

发明人： Yoshio Kameda ,  Masayuki Mizuno

IPC分类号： G06F11/00 ,  G06F11/22 ,  G06F11/07 ,  G06F11/16

CPC分类号： G06F11/1658 ,  G06F11/0793 ,  G06F11/1629 ,  G06F11/1641 ,  G06F11/165 ,  G06F11/1687 ,  G06F11/2236

摘要： A redundant computing system is composed of two systems: a first arithmetic processing unit (A-system) and a second arithmetic processing unit (B-system) having the same functions. A diagnosis control unit performs diagnosis of one system while the other system is performing arithmetic processing operation. The diagnosis control unit controls the input to the first and second arithmetic processing units by way of an input control unit according to the diagnosis operation, and an output control unit controls the output from the first and second arithmetic processing units according to the diagnosis result. After termination of the diagnosis, a value is copied from a storage unit of the system which has not been diagnosed to a storage unit of the system which has been diagnosed, and the redundant computing system resumes the redundant operation.

摘要翻译： 冗余计算系统由具有相同功能的第一算术处理单元（A系统）和第二算术处理单元（B系统）组成。 诊断控制单元执行一个系统的诊断，而另一个系统执行算术处理操作。 诊断控制单元根据诊断操作通过输入控制单元控制对第一和第二算术处理单元的输入，并且输出控制单元根据诊断结果控制来自第一和第二算术处理单元的输出。 在诊断结束后，从尚未被诊断的系统的存储单元复制到被诊断的系统的存储单元，并且冗余计算系统恢复冗余操作。