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公开(公告)号：US5663673A
公开(公告)日：1997-09-02
申请号：US413947
申请日：1995-03-30
申请人： Hirokazu Tanaka , Tatsuo Kumano , Tetsuji Funaki , Takahiro Watai
发明人： Hirokazu Tanaka , Tatsuo Kumano , Tetsuji Funaki , Takahiro Watai
CPC分类号： H03F3/3071 , H03F1/307
摘要： An output circuit, for minimizing output idle current fluctuations and improve the output voltage range, has first and second transistors connected to first and second power sources, with a plurality of diodes connected to control terminals of the first and second transistors. The output circuit further includes a third transistor having a first terminal connected to the second power source and a second terminal connected to a predetermined position among the plurality of diodes. A predetermined voltage is applied from the diodes to the control terminal of the first transistor when the third transistor is saturated, to bring a level of an output of said output circuit close to a level of the second power source. A fourth transistor, a fifth transistor, a first resistor, and a capacitor are also provided. The forth transistor has a control terminal connected to an output of a differential circuit, and a first terminal connected to the second power source through the first resistor as well as to the control terminals of the third and fifth transistors. A second terminal is connected to the first power source, with the fifth transistor having a first terminal connected to the second power source and a second terminal connected to the control terminal of the second transistor. The capacitor is connected between the control terminal of the fourth transistor and the second terminal of the fifth transistor. This output circuit also limits the output voltage without changing the impedance of the high-impedance input.
摘要翻译： 用于最小化输出空闲电流波动并改善输出电压范围的输出电路具有连接到第一和第二电源的第一和第二晶体管，多个二极管连接到第一和第二晶体管的控制端子。 输出电路还包括具有连接到第二电源的第一端子和连接到多个二极管中的预定位置的第二端子的第三晶体管。 当第三晶体管饱和时，从二极管向第一晶体管的控制端施加预定电压，以使所述输出电路的输出电平接近第二电源的电平。 还提供第四晶体管，第五晶体管，第一电阻器和电容器。 第四晶体管具有连接到差分电路的输出的控制端子，以及通过第一电阻器连接到第二电源的第一端子以及第三和第五晶体管的控制端子。 第二端子连接到第一电源，第五晶体管具有连接到第二电源的第一端子和连接到第二晶体管的控制端子的第二端子。 电容器连接在第四晶体管的控制端和第五晶体管的第二端之间。 该输出电路还限制输出电压，而不改变高阻抗输入的阻抗。
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公开(公告)号：US5684874A
公开(公告)日：1997-11-04
申请号：US559163
申请日：1995-11-13
CPC分类号： H04M3/2272 , H04M19/026
摘要： A ringtrip judging circuit includes a single comparator for comparing a detection value of a ringing current with a threshold value and for outputting the result of the comparison, a threshold value control circuit for supplying the threshold value to the comparator, and a judging circuit for judging ringtrip based on the output of the comparator. During a prescribed period after ringing signal transmission, the threshold value control circuit changes the threshold value in a steplike manner in accordance with the result of the comparison, thereby determining a threshold value greater than a peak value during the prescribed period, and based on it, determines a threshold value for ringtrip judgement and supplies it to the comparator.
摘要翻译： 一种铃声判断电路包括：一个比较器，用于将振铃电流的检测值与阈值进行比较，并输出比较结果;阈值控制电路，用于将阈值提供给比较器;判断电路，用于判断 基于比较器输出的铃声。 在振铃信号发送之后的规定期间，阈值控制电路根据比较结果以阶梯状的方式改变阈值，由此确定在规定期间内大于峰值的阈值，并且基于该阈值 ，确定用于拨号判断的阈值，并将其提供给比较器。
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公开(公告)号：US5880610A
公开(公告)日：1999-03-09
申请号：US58984
申请日：1998-04-13
摘要： A device for converting a current pulse signal into a voltage pulse signal through a conversion from a current to a voltage includes a converting unit converting the current pulse signal into a first voltage signal, a voltage reducing unit generating a second voltage signal by reducing a magnitude of the first voltage signal, a delay unit generating a third voltage signal by delaying the second voltage signal, and a comparison unit generating the voltage pulse signal by comparing the first voltage signal with the third voltage signal.
摘要翻译： 用于通过从电流到电压的转换将当前脉冲信号转换为电压脉冲信号的装置包括将当前脉冲信号转换为第一电压信号的转换单元，通过减小幅度产生第二电压信号的电压降低单元 通过延迟所述第二电压信号产生第三电压信号的延迟单元，以及通过将所述第一电压信号与所述第三电压信号进行比较来产生所述电压脉冲信号的比较单元。
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公开(公告)号：US20100309594A1
公开(公告)日：2010-12-09
申请号：US12793635
申请日：2010-06-03
申请人： Hirohiko SADAMATSU , Tetsuji Funaki , Norio Nagase
发明人： Hirohiko SADAMATSU , Tetsuji Funaki , Norio Nagase
IPC分类号： H02H9/04
CPC分类号： H03F3/195 , H01L2224/48091 , H01L2224/48227 , H01L2224/49112 , H01L2924/13091 , H01L2924/30107 , H03F1/52 , H03F2200/441 , H03F2200/444 , H01L2924/00014 , H01L2924/00
摘要： An integrated circuit device includes a first power supply domain and a second power supply domain, wherein the first power supply domain includes a first power supply line and a second power supply line, an internal circuit between the first power supply line and the second power supply line, a first clamp circuit that electrically couples between the first power supply line and the second power supply line when a certain potential difference is generated between the first power supply line and the second power supply line, and at least one of a junction element that is between the first clamp circuit and the first power supply line and a junction element that is between the first clamp circuit and the second power supply line, the junction element allowing current to flow when the first clamp circuit becomes electrically conductive.
摘要翻译： 集成电路装置包括第一电源域和第二电源域，其中第一电源域包括第一电源线和第二电源线，第一电源线和第二电源之间的内部电路 线，当在第一电源线和第二电源线之间产生一定的电位差时，第一钳位电路在第一电源线和第二电源线之间电耦合，以及至少一个连接元件， 在第一钳位电路和第一电源线之间以及在第一钳位电路和第二电源线之间的接合元件，当第一钳位电路变得导电时，接合元件允许电流流动。
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公开(公告)号：US5804997A
公开(公告)日：1998-09-08
申请号：US621091
申请日：1996-03-22
摘要： A device for converting a current pulse signal into a voltage pulse signal through a conversion from a current to a voltage includes a converting unit converting the current pulse signal into a first voltage signal, a voltage reducing unit generating a second voltage signal by reducing a magnitude of the first voltage signal, a delay unit generating a third voltage signal by delaying the second voltage signal, and a comparison unit generating the voltage pulse signal by comparing the first voltage signal with the third voltage signal.
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