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公开(公告)号：US20100238153A1
公开(公告)日：2010-09-23
申请号：US12709254
申请日：2010-02-19
IPC分类号： G06F3/038
CPC分类号： H03F3/345 , G09G2310/027 , G09G2310/0297 , H03F3/45179
摘要： A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
摘要翻译： 提供从多个输入电压获得更精确的输出电压的电路。 双输入单输出电路包括允许预定电流流动的电流源晶体管，共源共栅晶体管部分，其包括共源共栅式连接到电流源晶体管的漏极侧并具有相同特性的两个MOS晶体管，差分 所述第一差分对具有由第一输入侧晶体管和源极线共享的第一输出侧晶体管和由第二输入侧晶体管和第二输出侧晶体管形成的第二差分对形成的第一差分对， 被共享，并且是电流镜电路部分。 级联晶体管部分的晶体管的漏极线分别连接到第一和第二差分对的源极线。
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公开(公告)号：US08576214B2
公开(公告)日：2013-11-05
申请号：US12709254
申请日：2010-02-19
CPC分类号： H03F3/345 , G09G2310/027 , G09G2310/0297 , H03F3/45179
摘要： A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
摘要翻译： 提供从多个输入电压获得更精确的输出电压的电路。 双输入单输出电路包括允许预定电流流动的电流源晶体管，共源共栅晶体管部分，其包括共源共栅式连接到电流源晶体管的漏极侧并具有相同特性的两个MOS晶体管，差分 所述第一差分对具有由第一输入侧晶体管和源极线共享的第一输出侧晶体管和由第二输入侧晶体管和第二输出侧晶体管形成的第二差分对形成的第一差分对， 被共享，并且是电流镜电路部分。 级联晶体管部分的晶体管的漏极线分别连接到第一和第二差分对的源极线。
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公开(公告)号：US20100328292A1
公开(公告)日：2010-12-30
申请号：US12825596
申请日：2010-06-29
IPC分类号： G06F3/038
CPC分类号： G09G3/20 , G02F1/13306 , G09G3/36
摘要： A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.
摘要翻译： 输出基于8位数字值的电压的解码器电路包括：分别使用8位数字值的高位6位输出一个电压的第一解码器电路和第二解码器电路; 接收从第一解码器电路和第二解码器电路输出的电压并将两个电压分配给三个端子的选择电路; 以及中间电压输出电路，其基于三个电压输出作为五种值中的一种的中间电压。 第一解码器电路和第二解码器电路分别包括选择开关型解码器电路和比赛型解码器电路。 由于这样的结构，可以减小输出对应于8位数字值的电压的解码器电路的电路规模。
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公开(公告)号：US08477131B2
公开(公告)日：2013-07-02
申请号：US12825596
申请日：2010-06-29
IPC分类号： G06F3/038
CPC分类号： G09G3/20 , G02F1/13306 , G09G3/36
摘要： A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.
摘要翻译： 输出基于8位数字值的电压的解码器电路包括：分别使用8位数字值的高位6位输出一个电压的第一解码器电路和第二解码器电路; 接收从第一解码器电路和第二解码器电路输出的电压并将两个电压分配给三个端子的选择电路; 以及中间电压输出电路，其基于三个电压输出作为五种值中的一种的中间电压。 第一解码器电路和第二解码器电路分别包括选择开关型解码器电路和比赛型解码器电路。 由于这样的结构，可以减小输出对应于8位数字值的电压的解码器电路的电路规模。
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5.发明授权Display device having low voltage differential signal lines overlapping drive circuits 有权具有与驱动电路重叠的低电压差分信号线的显示装置公开(公告)号：US07737929B2
公开(公告)日：2010-06-15
申请号：US10819187
申请日：2004-04-07
申请人： Shigeru Itou , Shuuichirou Matsumoto , Yukihide Ode , Hidetoshi Kida , Kouichi Kotera , Gou Yamamoto
发明人： Shigeru Itou , Shuuichirou Matsumoto , Yukihide Ode , Hidetoshi Kida , Kouichi Kotera , Gou Yamamoto
IPC分类号： G09G3/36
CPC分类号： G09G5/006
摘要： A display device which transmits display data to drive circuits which drive a display panel using low voltage differential signals have input circuits which are hardly influenced by noise. To transmit the low voltage differential signals under the same condition, low voltage differential signal lines are formed in a zigzag pattern so as to make the lengths of the lines equal. To reduce the influence generated by the overlapping of the zigzagged low voltage differential signal lines and the drive circuits, level shift circuits are provided to the input circuits so as to make the input signals assume a stable operation level.
摘要翻译： 将显示数据发送到使用低电压差分信号驱动显示面板的驱动电路的显示装置具有几乎不受噪声影响的输入电路。 为了在相同的条件下传输低电压差分信号，以锯齿形式形成低压差分信号线，以使线路的长度相等。 为了减少锯齿形低压差分信号线和驱动电路的重叠产生的影响，向输入电路提供电平移位电路，使得输入信号呈现稳定的工作电平。
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公开(公告)号：US20110122118A1
公开(公告)日：2011-05-26
申请号：US12951164
申请日：2010-11-22
申请人： Yoshihiro Kotani , Takeshi Shibata , Gou Yamamoto , Kouichi Kotera , Masato Ishii , Norio Mamba
发明人： Yoshihiro Kotani , Takeshi Shibata , Gou Yamamoto , Kouichi Kotera , Masato Ishii , Norio Mamba
IPC分类号： G09G5/00
CPC分类号： G09G3/3233 , G09G2310/0281 , G09G2310/061 , G09G2320/029 , G09G2320/046
摘要： To obtain a display device that can perform measurements in a wider range and detect characteristic changes with high accuracy while suppressing the increase in circuit size. The display device includes display elements and a characteristic testing unit that tests characteristics of the display elements, and the characteristic testing unit includes a current supply unit for the display element as a target of test, a reference voltage output unit, an output voltage detecting unit that detects a code of a voltage of the test target display element relative to the reference voltage at each time, and a test control unit that allows the reference voltage output unit to sequentially output the reference voltages in response to the codes and acquires a measurement result of the voltage of the test target display element based on the codes.
摘要翻译： 为了获得能够在更宽范围内进行测量并且以抑制电路尺寸增加的方式高精度地检测特性变化的显示装置。 显示装置包括显示元件和测试显示元件的特性的特征测试单元，特征测试单元包括用于显示元件的电流供应单元作为测试对象，参考电压输出单元，输出电压检测单元 每次检测目标显示元件的电压相对于参考电压的代码;以及测试控制单元，其允许参考电压输出单元响应于代码顺序输出参考电压并获取测量结果 基于代码的测试目标显示元件的电压。
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7.发明申请Semiconductor integrated circuit, liquid crystal drive device, and liquid crystal display system 有权半导体集成电路，液晶驱动装置和液晶显示系统公开(公告)号：US20050146493A1
公开(公告)日：2005-07-07
申请号：US10433666
申请日：2001-10-25
申请人： Arata Kinjo , Kazuo Ookado , Kouichi Kotera , Hitoshi Oda , Masuhiro Endo
发明人： Arata Kinjo , Kazuo Ookado , Kouichi Kotera , Hitoshi Oda , Masuhiro Endo
CPC分类号： G09G3/3688 , G09G3/3611 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2330/02 , G09G2330/021 , G09G2330/022 , G09G2330/06 , G09G2360/02 , G09G2370/08
摘要： A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.
摘要翻译： 一种具有差分型输入电路的液晶驱动装置，该差分型输入电路包括用于接收差分信号的差分放大级和用于基于差分放大级的输出产生输出信号的缓冲级，用于接收的液晶驱动装置 经由输入电路的显示数据的信号，并且基于显示数据输出用于驱动液晶面板的信号，其中液晶驱动电压VLCD大于用于提供给操作电压的逻辑的电源电压VCC 缓冲级提供给输入电路的差分放大级。 提供在不接收显示数据的期间中断差分放大级的工作电流的待机功能。
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公开(公告)号：US08605025B2
公开(公告)日：2013-12-10
申请号：US13067280
申请日：2011-05-20
申请人： Yoshinori Aoki , Mitsuru Goto , Shouji Nagao , Kouichi Kotera
发明人： Yoshinori Aoki , Mitsuru Goto , Shouji Nagao , Kouichi Kotera
IPC分类号： G09G3/20
CPC分类号： G09G3/3688 , G09G3/20 , G09G3/2003 , G09G3/2011 , G09G3/3696 , G09G5/008 , G09G2310/027 , G09G2310/0278 , G09G2310/08 , G09G2320/0686 , G09G2330/021 , G09G2330/028 , G09G2340/0428 , G11C11/412 , G11C11/417
摘要： The present invention relates to enhancing low power consumption of a display device having a SRAM. The display device includes a drive circuit receiving video data; video lines connected the drive circuit; and pixels connected to the video signals. The drive circuit includes a memory storing the video data in memory cells. Each memory cell includes a first inverter with input and output terminals connected to first and second nodes, respectively. A second inverter has output and input terminals connected to the first and second nodes, respectively. A First and second transistors between a first data line and the first node each have a control terminal connected to a first word line or a third word line, respectively. Third and fourth transistors between a second data line and the second node each have a control terminal connected to a second word line or a fourth word line, respectively.
摘要翻译： 本发明涉及增强具有SRAM的显示装置的低功耗。 显示装置包括：接收视频数据的驱动电路; 视频线连接驱动电路; 和连接到视频信号的像素。 驱动电路包括将视频数据存储在存储单元中的存储器。 每个存储单元包括分别连接到第一和第二节点的输入和输出端子的第一逆变器。 第二反相器分别具有连接到第一和第二节点的输出端和输入端。 第一数据线和第一节点之间的第一和第二晶体管分别具有连接到第一字线或第三字线的控制端。 第二数据线和第二节点之间的第三和第四晶体管分别具有连接到第二字线或第四字线的控制端。
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9.发明申请SEMICONDUCTOR INTEGRATED CIRCUIT, LIQUID CRYSTAL DRIVE DEVICE, AND LIQUID CRYSTAL DISPLAY SYSTEM 有权半导体集成电路，液晶驱动器件和液晶显示系统公开(公告)号：US20070279358A1
公开(公告)日：2007-12-06
申请号：US11833704
申请日：2007-08-03
申请人： Arata Kinjo , Kazuo Ookado , Kouichi Kotera , Hitoshi Oda , Masuhiro Endo
发明人： Arata Kinjo , Kazuo Ookado , Kouichi Kotera , Hitoshi Oda , Masuhiro Endo
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3611 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2330/02 , G09G2330/021 , G09G2330/022 , G09G2330/06 , G09G2360/02 , G09G2370/08
摘要： A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.
摘要翻译： 一种具有差分型输入电路的液晶驱动装置，该差分型输入电路包括用于接收差分信号的差分放大级和用于基于差分放大级的输出产生输出信号的缓冲级，用于接收的液晶驱动装置 经由输入电路的显示数据的信号，并且基于显示数据输出用于驱动液晶面板的信号，其中液晶驱动电压VLCD大于用于提供给操作电压的逻辑的电源电压VCC 缓冲级提供给输入电路的差分放大级。 提供在不接收显示数据的期间中断差分放大级的工作电流的待机功能。
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10.发明授权Semiconductor integrated circuit, liquid crystal drive device, and liquid crystal display system 有权半导体集成电路，液晶驱动装置和液晶显示系统公开(公告)号：US08094104B2
公开(公告)日：2012-01-10
申请号：US11833704
申请日：2007-08-03
申请人： Arata Kinjo , Kazuo Ookado , Kouichi Kotera , Hitoshi Oda , Masuhiro Endo
发明人： Arata Kinjo , Kazuo Ookado , Kouichi Kotera , Hitoshi Oda , Masuhiro Endo
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3611 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2330/02 , G09G2330/021 , G09G2330/022 , G09G2330/06 , G09G2360/02 , G09G2370/08
摘要： A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.
摘要翻译： 一种具有差分型输入电路的液晶驱动装置，该差分型输入电路包括用于接收差分信号的差分放大级和用于基于差分放大级的输出产生输出信号的缓冲级，用于接收的液晶驱动装置 经由输入电路的显示数据的信号，并且基于显示数据输出用于驱动液晶面板的信号，其中液晶驱动电压VLCD大于用于提供给操作电压的逻辑的电源电压VCC 缓冲级提供给输入电路的差分放大级。 提供在不接收显示数据的期间中断差分放大级的工作电流的待机功能。
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