公开(公告)号：US07863648B2

公开(公告)日：2011-01-04

申请号：US11921854

申请日：2006-06-12

申请人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tatsuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Akio Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

发明人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tatsuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Akio Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

IPC分类号： H01L29/812 ,  H01L21/338

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/404 ,  H01L29/802 ,  H01L29/812

摘要： A field effect transistor (100) exhibiting good performance at high voltage operation and high frequency includes a first field plate electrode (116) and a second field plate electrode (118). The second field plate electrode includes a shielding part (119) located in the region between the first field plate electrode and a drain electrode (114), and serves to shield the first field plate electrode from the drain electrode. When in the cross sectional view in the gate length direction, the length in the gate length direction of an overlap region where the second field plate electrode (118) overlap the upper part of a structure including the first field plate electrode and a gate electrode (113) is designated as Lol, and the gate length is Lg, the relation expressed as 0 ≦Lol/Lg≦1 holds.

摘要翻译： 在高电压运行和高频下表现出良好性能的场效应晶体管（100）包括第一场极板电极（116）和第二场板电极（118）。 第二场板电极包括位于第一场极板电极和漏电极（114）之间的区域中的屏蔽部分（119），用于屏蔽第一场极板电极与漏极电极。 当在栅极长度方向的横截面视图中，第二场板电极（118）与包括第一场极板电极和栅电极的结构的上部重叠的重叠区域的栅极长度方向上的长度（ 113表示为Lol，栅极长度为Lg，表示为0＆nlE; Lol / Lg＆nlE; 1的关系成立。

公开(公告)号：US07800131B2

公开(公告)日：2010-09-21

申请号：US11921857

申请日：2006-06-12

申请人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tatsuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Akio Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

发明人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tatsuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Akio Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

IPC分类号： H01L29/812 ,  H01L21/338

CPC分类号： H01L29/404 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/802 ,  H01L29/812

摘要： A field effect transistor includes a layer structure made of compound semiconductor (111) provided on a semiconductor substrate (110) made of GaAs or InP, as an operation layer, and employs a first field plate electrode (116) and a second field plate electrode (118). The second field plate electrode includes a shielding part (119) located in the region between the first field plate electrode and a drain electrode (114), and serves to shield the first field plate electrode from the drain electrode. When, in the cross sectional view in the gate length direction, the length in the gate length direction of an overlap region, in which the second field plate electrode overlaps the upper part of a structure composed of the first field plate electrode and a gate electrode (113), is designated as Lol, and the gate length is Lg, the relation expressed as 0≦Lol/Lg≦1 holds.

摘要翻译： 场效应晶体管包括由设置在由GaAs或InP制成的半导体衬底（110）上的化合物半导体（111）作为操作层的层结构，并且采用第一场极板电极（116）和第二场极板电极 （118）。 第二场板电极包括位于第一场极板电极和漏电极（114）之间的区域中的屏蔽部分（119），用于屏蔽第一场极板电极与漏极电极。 当在栅极长度方向的截面图中，重叠区域的栅极长度方向上的长度，其中第二场极板电极与由第一场极板电极和栅电极构成的结构的上部重叠 （113）表示为Lol，栅极长度为Lg，表示为0＆nlE; Lol / Lg＆nlE; 1的关系成立。

公开(公告)号：US20090230429A1

公开(公告)日：2009-09-17

申请号：US11921854

申请日：2006-06-12

申请人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tasuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Akio Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

发明人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tasuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Akio Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

IPC分类号： H01L29/80

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/404 ,  H01L29/802 ,  H01L29/812

摘要： A field effect transistor (100) exhibiting good performance at high voltage operation and high frequency includes a first field plate electrode (116) and a second field plate electrode (118). The second field plate electrode includes a shielding part (119) located in the region between the first field plate electrode and a drain electrode (114), and serves to shield the first field plate electrode from the drain electrode. When in the cross sectional view in the gate length direction, the length in the gate length direction of an overlap region where the second field plate electrode (118) overlap the upper part of a structure including the first field plate electrode and a gate electrode (113) is designated as Lol, and the gate length is Lg, the relation expressed as 0≦Lol/Lg≦1 holds.

摘要翻译： 在高电压运行和高频下表现出良好性能的场效应晶体管（100）包括第一场极板电极（116）和第二场板电极（118）。 第二场板电极包括位于第一场极板电极和漏电极（114）之间的区域中的屏蔽部分（119），用于屏蔽第一场极板电极与漏极电极。 当在栅极长度方向的横截面视图中，第二场板电极（118）与包括第一场极板电极和栅电极的结构的上部重叠的重叠区域的栅极长度方向上的长度（ 113）被指定为Lol，栅极长度为Lg，表示为0 <= Lol / Lg <= 1的关系成立。

公开(公告)号：US20090230430A1

公开(公告)日：2009-09-17

申请号：US11921857

申请日：2006-06-12

申请人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tatsuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Aklo Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

发明人： Hironobu Miyamoto ,  Yuji Ando ,  Yasuhiro Okamoto ,  Tatsuo Nakayama ,  Takashi Inoue ,  Kazuki Ota ,  Aklo Wakejima ,  Kensuke Kasahara ,  Yasuhiro Murase ,  Kohji Matsunaga ,  Katsumi Yamanoguchi ,  Hidenori Shimawaki

IPC分类号： H01L29/78

CPC分类号： H01L29/404 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/802 ,  H01L29/812

摘要： A field effect transistor includes a layer structure made of compound semiconductor (111) provided on a semiconductor substrate (110) made of GaAs or InP, as an operation layer, and employs a first field plate electrode (116) and a second field plate electrode (118). The second field plate electrode includes a shielding part (119) located in the region between the first field plate electrode and a drain electrode (114), and serves to shield the first field plate electrode from the drain electrode. When, in the cross sectional view in the gate length direction, the length in the gate length direction of an overlap region, in which the second field plate electrode overlaps the upper part of a structure composed of the first field plate electrode and a gate electrode (113), is designated as Lol, and the gate length is Lg, the relation expressed as 0≦Lol/Lg≦1 holds.

摘要翻译： 场效应晶体管包括由设置在由GaAs或InP制成的半导体衬底（110）上的化合物半导体（111）作为操作层的层结构，并且采用第一场极板电极（116）和第二场极板电极 （118）。 第二场板电极包括位于第一场极板电极和漏电极（114）之间的区域中的屏蔽部分（119），用于屏蔽第一场极板电极与漏极电极。 当在栅极长度方向的截面图中，重叠区域的栅极长度方向上的长度，其中第二场极板电极与由第一场极板电极和栅电极构成的结构的上部重叠 （113）表示为Lol，栅极长度为Lg，表示为0 <= Lol / Lg <= 1的关系成立。

公开(公告)号：US20090045438A1

公开(公告)日：2009-02-19

申请号：US12159599

申请日：2006-10-25

申请人： Takashi Inoue ,  Tatsuo Nakayama ,  Yuji Ando ,  Yasuhiro Murase ,  Kazuki Ota ,  Hironobu Miyamoto ,  Katsumi Yamanoguchi ,  Naotaka Kuroda ,  Akio Wakejima ,  Yasuhiro Okamoto

发明人： Takashi Inoue ,  Tatsuo Nakayama ,  Yuji Ando ,  Yasuhiro Murase ,  Kazuki Ota ,  Hironobu Miyamoto ,  Katsumi Yamanoguchi ,  Naotaka Kuroda ,  Akio Wakejima ,  Yasuhiro Okamoto

IPC分类号： H01L29/205 ,  H01L29/80

CPC分类号： H01L29/7783 ,  H01L29/0607 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/7787

摘要： In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a≧5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 Å) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

摘要翻译： 在III族氮化物型场效应晶体管中，本发明通过缓冲层中的残留载流子的传导来减少漏电流成分，并且可以实现击穿电压的提高，并提高载流子限制效应（载流子限制） 提高夹断特性的通道（抑制短路效应）。 例如，当将本发明应用于GaN型场效应晶体管时，除了沟道层的GaN之外，使用其中铝组成逐渐或逐步朝向顶部的组分调制（组成梯度）AlGaN层用作 缓冲层（杂质缓冲液）。 对于要制备的FET的栅极长度Lg，选择电子供给层和沟道层的层厚度的和a以满足Lg / a> = 5，并且在这种情况下， 在不超过5倍（约500）的范围内选择通道层，只要在室温下积聚在通道层中的二维电子气的德布罗意波长即可。

公开(公告)号：US08853666B2

公开(公告)日：2014-10-07

申请号：US12159599

申请日：2006-10-25

申请人： Takashi Inoue ,  Tatsuo Nakayama ,  Yuji Ando ,  Yasuhiro Murase ,  Kazuki Ota ,  Hironobu Miyamoto ,  Katsumi Yamanoguchi ,  Naotaka Kuroda ,  Akio Wakejima ,  Yasuhiro Okamoto

发明人： Takashi Inoue ,  Tatsuo Nakayama ,  Yuji Ando ,  Yasuhiro Murase ,  Kazuki Ota ,  Hironobu Miyamoto ,  Katsumi Yamanoguchi ,  Naotaka Kuroda ,  Akio Wakejima ,  Yasuhiro Okamoto

IPC分类号： H01L29/06 ,  H01L29/15 ,  H01L29/778 ,  H01L29/423 ,  H01L29/20

CPC分类号： H01L29/7783 ,  H01L29/0607 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/7787

摘要： In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a≧5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 Å) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

摘要翻译： 在III族氮化物型场效应晶体管中，本发明通过缓冲层中的残留载流子的传导来减少漏电流成分，并且可以实现击穿电压的提高，并提高载流子限制效应（载流子限制） 提高夹断特性的通道（抑制短路效应）。 例如，当将本发明应用于GaN型场效应晶体管时，除了沟道层的GaN之外，使用其中铝组成逐渐或逐步朝向顶部的组分调制（组成梯度）AlGaN层用作 缓冲层（杂质缓冲液）。 对于要制备的FET的栅极长度Lg，选择电子供给层和沟道层的层厚度的和a以满足Lg /a≥5，并且在这种情况下，沟道的层厚度 只要在室温下积聚在通道层中的二维电子气的德布罗意波长，不超过5倍（约500）的范围内选择层。