Method and apparatus for performing exception processing routine in
pipeline processing
    2.
    发明授权
    Method and apparatus for performing exception processing routine in pipeline processing 失效
    在流水线处理中执行异常处理程序的方法和装置

    公开(公告)号:US5938762A

    公开(公告)日:1999-08-17

    申请号:US726753

    申请日:1996-10-07

    IPC分类号: G06F9/32 G06F9/38 G06F9/46

    CPC分类号: G06F9/322 G06F9/3861

    摘要: An information processing apparatus and method, such that when an interruption occurs in a microprocessor, an exception processing sequence control is started, a program condition of an interrupted program and an address of the interrupted program are saved in a RAM, a program address of a jump instruction is read out from an exception processing generating source and is set in a program counter, and the exception processing sequence control is stopped. Thereafter, a normal processing sequence control is started, the jump instruction is read out from a ROM, an address of an exception processing vector is calculated according to the jump instruction, the exception processing vector is read out from the ROM, a branch address of an exception processing routine indicated by the exception processing vector is set in the program counter, and an operation state of the microprocessor is branched to the exception processing routine. Thereafter, the normal processing sequence control is stopped, and the exception processing routine is performed in the exception processing sequence control.

    摘要翻译: 一种信息处理装置和方法,当在微处理器中发生中断时,开始异常处理顺序控制,中断程序的程序条件和中断程序的地址被保存在RAM中,程序地址 从异常处理生成源读出跳转指令,并将其设置在程序计数器中,并停止异常处理顺序控制。 此后,开始通常的处理顺序控制,从ROM读出跳转指令,根据跳转指令计算出异常处理向量的地址,从ROM中读出异常处理向量,分支地址 在程序计数器中设置由异常处理向量指示的异常处理程序,并且将微处理器的操作状态分支到异常处理程序。 此后,停止正常处理顺序控制,并且在异常处理顺序控制中执行异常处理程序。

    Pipeline arithmetic and logic system with clock control function for
selectively supplying clock to a given unit
    3.
    发明授权
    Pipeline arithmetic and logic system with clock control function for selectively supplying clock to a given unit 失效
    具有时钟控制功能的管道算术和逻辑系统,用于选择性地为给定单元提供时钟

    公开(公告)号:US5771376A

    公开(公告)日:1998-06-23

    申请号:US725495

    申请日:1996-10-04

    IPC分类号: G06F9/312 G06F9/32 G06F9/38

    摘要: A pipeline arithmetic and logic system capable of adjusting operational timings among stages without using an NOP instruction, providing a size reduction of its control section. The system has a decoder set including decoder groups divided into a decoder group for controlling an arithmetic section unit, a register file unit and a program counter unit, and a decoder for control of an address unit, and further including a clock control unit controlled by the address unit control decoder. A clock signal from an external source is directly fed to the address unit while being fed through the clock control unit to the other units. When fetching a data transfer instruction and repeatedly executing an MA stage twice, the system stops the clock control unit at the execution of the first MA stage to inhibit the operations of the units other than the address unit.

    摘要翻译: 一种管道算术和逻辑系统,其能够在不使用NOP指令的情况下调整阶段之间的操作定时,从而提供其控制部分的尺寸减小。 该系统具有解码器组,其包括被分成用于控制算术部分单元的解码器组,寄存器文件单元和程序计数器单元的解码器组,以及用于控制地址单元的解码器,还包括由 地址单元控制解码器。 来自外部源的时钟信号直接馈送到地址单元,同时通过时钟控制单元馈送到其它单元。 当获取数据传输指令并重复执行MA阶段两次时,系统在执行第一MA级停止时钟控制单元以禁止地址单元以外的单元的操作。

    Pipeline processing apparatus for reducing delays in the performance of
processing operations
    4.
    发明授权
    Pipeline processing apparatus for reducing delays in the performance of processing operations 失效
    用于减少处理操作性能延迟的管线处理装置

    公开(公告)号:US6003127A

    公开(公告)日:1999-12-14

    申请号:US725709

    申请日:1996-10-04

    IPC分类号: G06F9/32 G06F9/38 G06F9/40

    摘要: A pipeline processing apparatus for performing processing operations in a succession of processing cycles, in which each cycle is composed of a succession of stages that include an instruction decoding stage for decoding an instruction associated with the cycle and an execution stage for executing an operation dependent on the instruction, and the processing cycles include a first cycle which starts at a first time and a second cycle that begins at a second time that is after the first time and that overlaps the first cycle in time. The apparatus is constructed and controlled for causing a branch instruction to be decoded in the instruction decoding stage of the first cycle; and for effecting a calculation in the execution stage of the first cycle, dependent on the branch instruction decoded in the instruction decoding stage of the first cycle.

    摘要翻译: 一种流水线处理装置,用于在一系列处理周期中执行处理操作,其中每个周期由包括用于解码与该周期相关联的指令的指令解码级的一系列级组成,以及用于执行依赖于 指令和处理周期包括从第一时间开始的第一周期和从第一次开始的第二个周期开始并且与第一周期重叠的第二周期。 该装置被构造和控制,用于使分支指令在第一周期的指令解码阶段被解码; 并且用于在第一周期的执行阶段中进行计算,这取决于在第一周期的指令解码阶段中解码的分支指令。

    Pipeline processing apparatus for reducing delays in the performance of processing operations
    5.
    发明授权
    Pipeline processing apparatus for reducing delays in the performance of processing operations 失效
    用于减少处理操作性能延迟的管线处理装置

    公开(公告)号:US06308263B1

    公开(公告)日:2001-10-23

    申请号:US09429022

    申请日:1999-10-29

    IPC分类号: G06F942

    摘要: A decoder decodes a branch instruction. An operating section executes logical, arithmetic, and shift operations. A register file store operation result of the operating section. A program counter counting the address of the present programs. A direct-setting bus is provided to allowing the decoder to directly set an immediate value to the program counter without passing through an output bus of the operating section. And, a switch selectively connects the direct-setting bus or the output bus to the program counter.

    摘要翻译: 解码器解码分支指令。 操作部分执行逻辑,算术和移位操作。 操作部分的注册文件存储操作结果。 一个程序计数器,用于计数当前程序的地址。 提供直接设置总线以允许解码器直接将程序计数器设置为不经过操作部分的输出总线的程序计数器。 而且,开关选择性地将直接设置总线或输出总线连接到程序计数器。

    METHOD FOR PRODUCING CHEMICALS BY CONTINUOUS FERMENTATION
    6.
    发明申请
    METHOD FOR PRODUCING CHEMICALS BY CONTINUOUS FERMENTATION 审中-公开
    通过连续发酵生产化学品的方法

    公开(公告)号:US20130330792A1

    公开(公告)日:2013-12-12

    申请号:US13976786

    申请日:2011-09-15

    IPC分类号: C12P7/56

    摘要: A method of producing a chemical by continuous fermentation includes a fermentation step of converting a fermentation feedstock to a fermentation liquid containing a chemical by fermentation on cultivation of a microorganism; a membrane separation step of recovering the chemical as a filtrate by a separation membrane from the fermentation liquid; a concentrating step of obtaining a permeate and a concentrate containing the chemical by a reverse osmosis membrane from the filtrate; and/or a purification step of distilling the filtrate to increase a purity of the chemical, in which, cleaning etc. of the separation membrane in the membrane separation step is preformed by using the permeated liquid from the reverse osmosis membrane in the concentrating step and/or the condensed liquid in the purification step.

    摘要翻译: 通过连续发酵生产化学品的方法包括发酵步骤,其通过在培养微生物时通过发酵将发酵原料转化成含有化学品的发酵液; 膜分离步骤,通过分离膜从发酵液中回收作为滤液的化学品; 浓缩步骤,从滤液中通过反渗透膜获得含有该化学物质的渗透物和浓缩物; 和/或纯化步骤,蒸馏滤液以提高化学品的纯度,其中通过在浓缩步骤中使用来自反渗透膜的透过液体来进行膜分离步骤中的分离膜的清洗等,以及 /或纯化步骤中的冷凝液体。

    SYSTEM MANAGEMENT APPARATUS AND SYSTEM MANAGEMENT METHOD
    8.
    发明申请
    SYSTEM MANAGEMENT APPARATUS AND SYSTEM MANAGEMENT METHOD 审中-公开
    系统管理装置和系统管理方法

    公开(公告)号:US20130080604A1

    公开(公告)日:2013-03-28

    申请号:US13378066

    申请日:2011-09-22

    IPC分类号: G06F15/177

    CPC分类号: H04L41/022 H04L41/12

    摘要: The present invention is for efficiently managing large numbers of apparatuses using multiple management protocols. A management information acquisition part 1A uses multiple different management protocols P1 and P2 to acquire management information for each of the management protocols from each apparatus 3. Anode configuration information management part 1B identifies apparatus configuration information acquired from the same apparatus of the respective apparatuses 3 by comparing the apparatus configuration information, and collectively manages these multiple pieces of apparatus configuration information as a single piece of apparatus configuration information. A component information management part 1C identifies multiple pieces of component information related to the same component, and manages these identified multiple pieces of component information after associating these pieces information with each other.

    摘要翻译: 本发明是为了有效地管理使用多种管理协议的大量设备。 管理信息获取部1A使用多个不同的管理协议P1和P2从每个装置3获取每个管理协议的管理信息。阳极配置信息管理部分1B识别从各个装置3的相同装置获取的装置配置信息, 比较装置配置信息,并将这些多件装置配置信息共同管理为单件装置配置信息。 分量信息管理部分1C识别与相同分量相关的多个分量信息,并且在将这些分块信息彼此关联之后管理这些识别的多个分量信息。

    CHANGEABLE APPARATUS FOR SINGLE OR RASTER SCANNING USING POLYGON MIRROR
    9.
    发明申请
    CHANGEABLE APPARATUS FOR SINGLE OR RASTER SCANNING USING POLYGON MIRROR 审中-公开
    使用POLYGON MIRROR进行单次扫描和扫描扫描的可变设备

    公开(公告)号:US20090219599A1

    公开(公告)日:2009-09-03

    申请号:US12298341

    申请日:2006-05-08

    申请人: Hiroshi Hayakawa

    发明人: Hiroshi Hayakawa

    IPC分类号: G02B26/10

    摘要: A changeable apparatus for scanning a symbol is disclosed wherein by selectively changing the position of a bending mirror (101), different scan patterns are produced. In a preferred embodiment, the different positions of the bending mirror (101) result in a scanning beam (107, 108) being directed off of different polygon scanning mirrors (104, 105) to create the different scanning patterns.

    摘要翻译: 公开了一种用于扫描符号的可变装置,其中通过选择性地改变弯曲镜(101)的位置,产生不同的扫描图案。 在优选实施例中,弯曲镜(101)的不同位置导致扫描光束(107,108)被引导离开不同的多边形扫描镜(104,105)以产生不同的扫描图案。

    Clematis plant ‘Fairy Blue’
    10.
    植物专利
    Clematis plant ‘Fairy Blue’ 有权
    铁线莲植物“仙女蓝”

    公开(公告)号:USPP18223P2

    公开(公告)日:2007-11-20

    申请号:US10367447

    申请日:2003-02-14

    申请人: Hiroshi Hayakawa

    发明人: Hiroshi Hayakawa

    IPC分类号: A01H5/00

    CPC分类号: A01H5/02

    摘要: A new Clematis cultivar which produces attractive violet flowers. This new and distinct variety has shown to be uniform and stable in the resulting generations from asexual propagation.

    摘要翻译: 一种新的铁线莲品种,产生有吸引力的紫罗兰花。 这种新的和独特的品种在无性繁殖的结果中表现出统一和稳定。