公开(公告)号：US06576937B2

公开(公告)日：2003-06-10

申请号：US09863343

申请日：2001-05-24

申请人： Hiroyuki Takazawa ,  Tohru Oka ,  Isao Ohbu ,  Yoshinori Imamura

发明人： Hiroyuki Takazawa ,  Tohru Oka ,  Isao Ohbu ,  Yoshinori Imamura

IPC分类号： H01L310328

CPC分类号： H01L29/7371 ,  H03F3/60

摘要： A semiconductor device including a bipolar transistor having an emitter layer consisting of a semiconductor containing indium, and a protective insulating film containing silicon and oxygen which is formed on the surface of the guard ring of the emitter layer, wherein the protective insulating film has a density of oxygen of less than 7×1022 cm−3. This semiconductor device prevents performance deterioration and ensures high performance in a power amplifier.

摘要翻译： 一种半导体器件，包括具有包含铟的半导体的发射极层的双极晶体管和形成在发射极层的保护环的表面上的含有氧和氧的保护绝缘膜，其中该保护绝缘膜具有密度 的氧气小于7×1022厘米-3。 该半导体器件防止性能恶化并确保功率放大器的高性能。

公开(公告)号：US06724020B2

公开(公告)日：2004-04-20

申请号：US10420764

申请日：2003-04-23

申请人： Hiroyuki Takazawa ,  Tohru Oka ,  Isao Ohbu ,  Yoshinori Imamura

发明人： Hiroyuki Takazawa ,  Tohru Oka ,  Isao Ohbu ,  Yoshinori Imamura

IPC分类号： H01L31109

CPC分类号： H01L29/7371 ,  H03F3/60

摘要： A semiconductor device comprising a bipolar transistor having an emitter layer consisting of a semiconductor containing indium, and a protective insulating film containing silicon and oxygen which is formed on the surface of the guard ring of the emitter layer, wherein the protective insulating film has a density of oxygen of less than 7×1022 cm−3. This semiconductor device prevents performance deterioration and ensures high performance in a power amplifier.

摘要翻译： 一种半导体器件，包括具有由包含铟的半导体构成的发射极层的双极晶体管和形成在发射极层的保护环的表面上的含有氧和氧的保护绝缘膜，其中该保护绝缘膜具有密度 的氧气小于7×10 22 cm -3。 该半导体器件防止性能恶化并确保功率放大器的高性能。

公开(公告)号：US20060138459A1

公开(公告)日：2006-06-29

申请号：US11316989

申请日：2005-12-27

申请人： Atsushi Kurokawa ,  Isao Ohbu ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura

发明人： Atsushi Kurokawa ,  Isao Ohbu ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura

IPC分类号： H01L31/109

CPC分类号： H01L29/7304 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/7371

摘要： Provided is a semiconductor device equipped with HBTs capable of satisfying both thermal stability and reliability and having improved electrostatic breakdown voltage. The HBT according to the present invention is obtained by successively forming, over the main surface of a substrate made of a compound semiconductor, a sub-collector layer, a collector layer, a base layer, an emitter layer, a collector electrode electrically connected to the collector layer, a base electrode electrically connected to the base layer, an emitter mesa layer formed over the emitter layer and electrically connected to the emitter layer, and an emitter electrode electrically connected to the emitter mesa layer. The emitter mesa layer has a semiconductor layer made of an n type GaAs layer, a high concentration semiconductor layer made of an n+ type GaAs layer over the semiconductor layer and a ballast resistor layer made of an n type InGaAs layer over the high concentration semiconductor layer.

摘要翻译： 提供了配备能够满足热稳定性和可靠性并具有改善的静电击穿电压的HBT的半导体器件。 根据本发明的HBT是通过在由化合物半导体制成的衬底的主表面上连续形成子集电极层，集电极层，基极层，发射极层，集电极，电连接到 集电极层，电连接到基极层的基极，在发射极层上形成并电连接到发射极层的发射极台面层和电连接到发射极台面层的发射极。 发射极台面层具有由n型GaAs层构成的半导体层，在半导体层上形成由n + +型GaAs层构成的高浓度半导体层和由n型GaAs层制成的镇流电阻层 InGaAs层在高浓度半导体层上。

公开(公告)号：US5523593A

公开(公告)日：1996-06-04

申请号：US36787

申请日：1993-03-25

申请人： Osamu Kagaya ,  Hiroyuki Takazawa ,  Yoshinori Imamura ,  Junji Shigeta ,  Yukihiro Kawata ,  Hiroto Oda

发明人： Osamu Kagaya ,  Hiroyuki Takazawa ,  Yoshinori Imamura ,  Junji Shigeta ,  Yukihiro Kawata ,  Hiroto Oda

IPC分类号： H01L27/06 ,  H01L29/08 ,  H01L29/778 ,  H01L31/0352

CPC分类号： H01L27/0605 ,  H01L29/0891

摘要： By forming an isolated semiconductor layer or electrode layer on a semiconductor surface between neighboring field effect transistors and element separating trenches which are deep enough to reach at least the semi-insulating substrate or the hetero junction interface on the buffer layer, low frequency oscillation of a compound semiconductor integrated circuit can be reduced. By controlling the thickness of the buffer layer having a hetero junction to at most 150 nm, the low frequency oscillation can be reduced. By forming materials separating adjacent elements with a width of at most 2 .mu.m which reach from the element region surface to the buffer layer having hetero junction so as to enclose the element regions and etched regions in the neighborhood of the elements or so as to enclose the element regions in the etched regions and by controlling the angle of the sides of the etched regions against the semiconductor layer surface to 10.degree. to 60.degree., wires can be prevented from short-circuiting.

摘要翻译： 通过在相邻的场效应晶体管和元件分离沟槽之间的半导体表面上形成隔离的半导体层或电极层，该沟槽深度足以到达缓冲层上的至少半绝缘衬底或异质结界面， 可以减少复合半导体集成电路。 通过将具有异质结的缓冲层的厚度控制为至多150nm，可以降低低频振荡。 通过形成将从元件区域表面到达具有异质结的缓冲层到达的至多2μm的宽度的相邻元件分开形成材料，以便在元件附近包围元件区域和蚀刻区域，以便包围 蚀刻区域中的元件区域和通过将蚀刻区域的侧面相对于半导体层表面的角度控制在10°至60°，可以防止导线短路。

公开(公告)号：US07411487B2

公开(公告)日：2008-08-12

申请号：US10542765

申请日：2004-01-20

申请人： Koji Takao ,  Tatehiko Yamada ,  Yoshinori Imamura

发明人： Koji Takao ,  Tatehiko Yamada ,  Yoshinori Imamura

IPC分类号： B60C23/02

CPC分类号： B60C23/0416 ,  B60C23/007 ,  B60C23/0437 ,  B60C23/044 ,  B60C23/0444 ,  B60C23/045

摘要： A tire-information administration system includes a plurality of sensor modules installed in tires; at least one reception module configured to receive data from the sensor modules; and a central control module configured to command the reception module to acquire data from the sensor modules. The central control module includes a predetermined number of connection ports for the reception module, assigned in advance to each sensor modules; and a specifically configured control means. The control means sequentially outputs at predetermined sampling time a command of data acquisition from a sensor module, to the connection port assigned to each sensor module; assigns the connection port to the sensor module for the next sampling, when there is a data input from the sensor module in response to the command; assigns data acquisition from the sensor module to another connection port, and assigns the other connection port to the sensor module for the next sampling, when there is no data input from the sensor module even by the command issuance. Thus, the tire-information administration system maintains communications even in case of troubles of the reception modules or damages of tires.

摘要翻译： 轮胎信息管理系统包括安装在轮胎中的多个传感器模块; 至少一个接收模块，被配置为从所述传感器模块接收数据; 以及中央控制模块，其被配置为命令所述接收模块从所述传感器模块获取数据。 中央控制模块包括用于接收模块的预定数量的连接端口，预先分配给每个传感器模块; 和具体配置的控制装置。 控制装置在预定的采样时间顺序地将从传感器模块获得数据的命令输出到分配给每个传感器模块的连接端口; 当传感器模块响应命令有数据输入时，将连接端口分配给传感器模块进行下一次采样; 将传感器模块的数据采集分配给另一个连接端口，并且即使通过命令发出也没有传感器模块的数据输入，也可以将其他连接端口分配给传感器模块进行下一个采样。 因此，轮胎信息管理系统即使在接收模块的故障或轮胎的损坏的情况下也保持通信。

公开(公告)号：US20070257332A1

公开(公告)日：2007-11-08

申请号：US11775716

申请日：2007-07-10

申请人： Atsushi KUROKAWA ,  Masao Yamane ,  Yoshinori Imamura

发明人： Atsushi KUROKAWA ,  Masao Yamane ,  Yoshinori Imamura

IPC分类号： H01L27/082

CPC分类号： H01L29/7371 ,  H01L29/1004 ,  H01L29/66318

摘要： A bipolar transistor having the enhanced characteristics is fabricated by etching a base mesa, which is formed below an emitter mesa (upper emitter layer) and a base electrode, to have jut regions on the edges of its generally rectangular region. A mask film, e.g., insulating film, is formed to cover the rectangular region and jut regions, and the base layer is etched by use of the insulating film for masking thereby to form a base mesa. Consequently, abnormal etching can be prevented from occurring along the base electrode and emitter mesa on the edges of the area where the base electrode and emitter mesa confront, and the increase of resistance between the base layer and the emitter layer can be prevented, whereby the bipolar transistor can have the enhanced characteristics.

摘要翻译： 具有增强特性的双极晶体管通过蚀刻形成在发射极台面（上部发射极层）和基底电极下方的基底台面而制成，以在其大致矩形区域的边缘上具有突起区域。 形成掩模膜例如绝缘膜以覆盖矩形区域和突起区域，并且通过使用用于掩蔽的绝缘膜来蚀刻基底层，从而形成基底台面。 因此，可以防止沿着基极和发射极台面所面对的区域的边缘上的基极和发射极台面发生异常蚀刻，并且可以防止基极层和发射极层之间的电阻的增加，由此 双极晶体管可以具有增强的特性。

公开(公告)号：US07256433B2

公开(公告)日：2007-08-14

申请号：US10833142

申请日：2004-04-28

申请人： Atsushi Kurokawa ,  Masao Yamane ,  Yoshinori Imamura

发明人： Atsushi Kurokawa ,  Masao Yamane ,  Yoshinori Imamura

IPC分类号： H01L29/739

CPC分类号： H01L29/7371 ,  H01L29/1004 ,  H01L29/66318

摘要： A bipolar transistor having enhanced characteristics is fabricated by etching a base mesa, which is formed below an emitter mesa (upper emitter layer) and a base electrode, so as to have jut regions on the edges of its generally rectangular region. A mask film, e.g., insulating film, is formed to cover the rectangular region and jut regions, and the base layer is etched by use of the insulating film as a mask to form a base mesa. Consequently, abnormal etching can be prevented from occurring along the base electrode and emitter mesa on the edges of the area where the base electrode and emitter mesa confront each other, and an increase in resistance between the base layer and the emitter layer can be prevented, whereby the bipolar transistor can have enhanced characteristics.

摘要翻译： 具有增强特性的双极晶体管通过蚀刻形成在发射极台面（上部发射极层）和基底电极下方的基底台面而制成，以便在其大致矩形区域的边缘上具有突起区域。 形成掩模膜例如绝缘膜以覆盖矩形区域和突起区域，并且通过使用绝缘膜作为掩模蚀刻基底层以形成基底台面。 因此，可以防止在基极和发射极台面彼此面对的区域的边缘上的基极和发射极台面发生异常蚀刻，并且可以防止基极层和发射极层之间的电阻的增加。 由此双极晶体管可以具有增强的特性。

公开(公告)号：US20060093015A1

公开(公告)日：2006-05-04

申请号：US10524262

申请日：2003-08-12

申请人： Eiji Ichihara ,  Yoshinori Imamura ,  Takehiko Yamada

发明人： Eiji Ichihara ,  Yoshinori Imamura ,  Takehiko Yamada

IPC分类号： G01K1/08

CPC分类号： B60C23/0408 ,  B60C23/20 ,  G01K13/08

摘要： There are provided a process and the like for judging a residual lifetime of a run-flat tire and an end stage of the residual lifetime thereof during continuous running at a run-flat state. The process for judging the residual lifetime of the tire of the invention is characterized in that in a vehicle equipped with a run-flat tire system comprising run-flat tires 2 and detection units 4 each arranged in the respective tire 2 and capable of measuring an atmosphere temperature in at least an interior 3 of the tire 2, when the tire 2 is continuously run at the run-flat state by an extreme lowering of an internal pressure accompanied with the occurrence of puncture or the like, after a limit temperature being statistically an occurrence of trouble is previously set, the atmosphere temperature inside tire of the run-flat tire continuously running at the run-flat state is measured, and a runnable time and/or distance until the run-flat tire results in trouble is predicted by using the atmosphere temperature inside tire measured and data calculated therefrom.

摘要翻译： 提供了一种用于在连续运行中的平坦状态下判断漏气保用轮胎的剩余寿命和剩余寿命的终止阶段的过程等。 用于判断本发明的轮胎的残余寿命的方法的特征在于，在配备有排气轮胎2和检测单元4的排气轮胎系统的车辆中，每个排气轮胎2和检测单元4分别布置在相应的轮胎2中并且能够测量 在轮胎2的至少内部3中的气氛温度，当轮胎2在极限温度为统计学上时，由于伴随着穿刺等的发生的内部压力的极度降低而在平坦状态下连续运行 预先设定故障的发生，测量在平坦状态下连续行驶的漏气保用轮胎的轮胎内的气氛温度，直到排气轮胎产生麻烦的运行时间和/或距离由 使用测量的轮胎内部的气氛温度和由此计算的数据。

公开(公告)号：US20060057789A1

公开(公告)日：2006-03-16

申请号：US11266259

申请日：2005-11-04

申请人： Atsushi Kurokawa ,  Toshiaki Kitahara ,  Hiroshi Inagawa ,  Yoshinori Imamura

发明人： Atsushi Kurokawa ,  Toshiaki Kitahara ,  Hiroshi Inagawa ,  Yoshinori Imamura

IPC分类号： H01L21/338

CPC分类号： H01L29/66143 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0652 ,  H01L27/0658 ,  H01L27/0664 ,  H01L29/475 ,  H01L29/66212 ,  H01L29/66318 ,  H01L29/7371

摘要： The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. The present invention is directed to the manufacturing method of a semiconductor device in which respective semiconductor layers which become a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of a semiconductor substrate and, thereafter, respective semiconductor layers are processed to form the hetero junction bipolar transistor, the Schottky diode and the resistance element in a monolithic manner. An emitter electrode of the hetero junction bipolar transistor, a Schottky electrode of the Schottky diode and a resistance film of the resistance element are simultaneously formed using a same material (for example, WSiN). Accordingly, the man-hours can be reduced and the manufacturing cost of the semiconductor device can be reduced.

公开(公告)号：USRE33094E

公开(公告)日：1989-10-17

申请号：US162312

申请日：1986-09-11

申请人： Eiichi Maruyama ,  Sachio Ishioka ,  Yoshinori Imamura ,  Hirokazu Matsubara ,  Yasuharu Shimomoto ,  Shinkichi Horigome ,  Yoshio Taniguchi

发明人： Eiichi Maruyama ,  Sachio Ishioka ,  Yoshinori Imamura ,  Hirokazu Matsubara ,  Yasuharu Shimomoto ,  Shinkichi Horigome ,  Yoshio Taniguchi

IPC分类号： G03G5/08 ,  G03G5/082 ,  H01L21/205 ,  H01L31/08

CPC分类号： G03G5/08235 ,  G03G5/08221

摘要： In an electrophotographic member employing an amorphous silicon photoconductive layer, a part which is at least 10 nm thick inwardly of the amorphous silicon layer from the surface (or interface) of the amorphous silicon layer is made of amorphous silicon which has an optical forbidden band gap of at least 1.6 eV and a resistivity of at least 10.sup.10 .OMEGA..cm. The electrophotographic member exhibits a satisfactory resolution and good dark-decay characteristics. Further, a region which has an optical forbidden band gap narrower than that of the amorphous silicon forming the surface (or interface) region is disposed within the amorphous silicon layer to a thickness of at least 10 nm, whereby the sensitivity of the electrophotographic member to longer wavelengths of light can be enhanced.