公开(公告)号：US20060138459A1

公开(公告)日：2006-06-29

申请号：US11316989

申请日：2005-12-27

申请人： Atsushi Kurokawa ,  Isao Ohbu ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura

发明人： Atsushi Kurokawa ,  Isao Ohbu ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura

IPC分类号： H01L31/109

CPC分类号： H01L29/7304 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/7371

摘要： Provided is a semiconductor device equipped with HBTs capable of satisfying both thermal stability and reliability and having improved electrostatic breakdown voltage. The HBT according to the present invention is obtained by successively forming, over the main surface of a substrate made of a compound semiconductor, a sub-collector layer, a collector layer, a base layer, an emitter layer, a collector electrode electrically connected to the collector layer, a base electrode electrically connected to the base layer, an emitter mesa layer formed over the emitter layer and electrically connected to the emitter layer, and an emitter electrode electrically connected to the emitter mesa layer. The emitter mesa layer has a semiconductor layer made of an n type GaAs layer, a high concentration semiconductor layer made of an n+ type GaAs layer over the semiconductor layer and a ballast resistor layer made of an n type InGaAs layer over the high concentration semiconductor layer.

摘要翻译： 提供了配备能够满足热稳定性和可靠性并具有改善的静电击穿电压的HBT的半导体器件。 根据本发明的HBT是通过在由化合物半导体制成的衬底的主表面上连续形成子集电极层，集电极层，基极层，发射极层，集电极，电连接到 集电极层，电连接到基极层的基极，在发射极层上形成并电连接到发射极层的发射极台面层和电连接到发射极台面层的发射极。 发射极台面层具有由n型GaAs层构成的半导体层，在半导体层上形成由n + +型GaAs层构成的高浓度半导体层和由n型GaAs层制成的镇流电阻层 InGaAs层在高浓度半导体层上。

公开(公告)号：US07511315B2

公开(公告)日：2009-03-31

申请号：US11108729

申请日：2005-04-19

申请人： Satoru Konishi ,  Tsuneo Endo ,  Hirokazu Nakajima ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura ,  Atsushi Kurokawa

发明人： Satoru Konishi ,  Tsuneo Endo ,  Hirokazu Nakajima ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura ,  Atsushi Kurokawa

IPC分类号： H01L21/00 ,  H01L29/34 ,  H01L23/48 ,  H01L21/4763

CPC分类号： H01L29/4933 ,  H01L21/84 ,  H01L23/4824 ,  H01L23/49844 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/16 ,  H01L29/456 ,  H01L29/7835 ,  H01L2224/1403 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.

摘要翻译： 半导体器件具有在布线基板的下表面上形成的用于GND的外部布线。 连接到GND的外部配线的多个通孔形成为穿透布线基板。 包括HBT的高功率的第一半导体芯片安装在布线基板的主表面上。 第一半导体芯片的发射极电极与形成在第一半导体芯片中的多个HBT的发射极共同连接。 发射极电极沿HBT排列的方向延伸。 第一半导体芯片安装在布线基板上，使得多个通孔与发射极电极连接。 散热值比第一半导体芯片低的第二半导体芯片安装在第一半导体芯片上。

公开(公告)号：US20050258452A1

公开(公告)日：2005-11-24

申请号：US11108729

申请日：2005-04-19

申请人： Satoru Konishi ,  Tsuneo Endo ,  Hirokazu Nakajima ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura ,  Atsushi Kurokawa

发明人： Satoru Konishi ,  Tsuneo Endo ,  Hirokazu Nakajima ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura ,  Atsushi Kurokawa

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/8222 ,  H01L21/84 ,  H01L23/34 ,  H01L23/482 ,  H01L23/498 ,  H01L25/065 ,  H01L25/07 ,  H01L25/16 ,  H01L25/18 ,  H01L27/082 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/737 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L29/4933 ,  H01L21/84 ,  H01L23/4824 ,  H01L23/49844 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/16 ,  H01L29/456 ,  H01L29/7835 ,  H01L2224/1403 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.

摘要翻译： 半导体器件具有在布线基板的下表面上形成的用于GND的外部布线。 连接到GND的外部配线的多个通孔形成为穿透布线基板。 包括HBT的高功率的第一半导体芯片安装在布线基板的主表面上。 第一半导体芯片的发射极电极与形成在第一半导体芯片中的多个HBT的发射极共同连接。 发射极电极沿HBT排列的方向延伸。 第一半导体芯片安装在布线基板上，使得多个通孔与发射极电极连接。 散热值比第一半导体芯片低的第二半导体芯片安装在第一半导体芯片上。

公开(公告)号：US20090194792A1

公开(公告)日：2009-08-06

申请号：US12413010

申请日：2009-03-27

申请人： Satoru Konishi ,  Tsuneo Endo ,  Hirokazu Nakajima ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura ,  Atsushi Kurokawa

发明人： Satoru Konishi ,  Tsuneo Endo ,  Hirokazu Nakajima ,  Yasunari Umemoto ,  Satoshi Sasaki ,  Chushiro Kusano ,  Yoshinori Imamura ,  Atsushi Kurokawa

IPC分类号： H01L27/082 ,  H01L23/498

CPC分类号： H01L29/4933 ,  H01L21/84 ,  H01L23/4824 ,  H01L23/49844 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/16 ,  H01L29/456 ,  H01L29/7835 ,  H01L2224/1403 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.

摘要翻译： 半导体器件具有在布线基板的下表面上形成的用于GND的外部布线。 连接到GND的外部配线的多个通孔形成为穿透布线基板。 包括HBT的高功率的第一半导体芯片安装在布线基板的主表面上。 第一半导体芯片的发射极电极与形成在第一半导体芯片中的多个HBT的发射极共同连接。 发射极电极沿HBT排列的方向延伸。 第一半导体芯片安装在布线基板上，使得多个通孔与发射极电极连接。 散热值比第一半导体芯片低的第二半导体芯片安装在第一半导体芯片上。

公开(公告)号：US20070164316A1

公开(公告)日：2007-07-19

申请号：US11723769

申请日：2007-03-22

申请人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

发明人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

IPC分类号： H01L31/00

CPC分类号： H01L29/7304 ,  H01L27/0605 ,  H01L29/7371 ,  H03F2200/444 ,  H03F2203/21178

摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.

公开(公告)号：US07045877B2

公开(公告)日：2006-05-16

申请号：US10420740

申请日：2003-04-23

申请人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

发明人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

IPC分类号： H01L31/072

CPC分类号： H01L27/0825 ,  H01L27/0259 ,  H01L29/7371 ,  H01L2224/48091 ,  H01L2224/73265 ,  H03K17/08146 ,  H03K17/615 ,  H01L2924/00014

摘要： The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

摘要翻译： 本发明旨在提高对半导体器件的破坏性。 具有连接在高输出的放大电路的输出（集电极和发射极）之间的达林顿的多个双极晶体管的保护电路与放大电路并联电连接。 放大电路具有彼此并联连接的多个单元HBT（异质结双极晶体管）。 保护电路具有包括具有多个双极型晶体管Q 1至Q 5的第一组保护电路和具有多个双极晶体管的第二组保护电路的两级配置。

公开(公告)号：US07804109B2

公开(公告)日：2010-09-28

申请号：US11723769

申请日：2007-03-22

申请人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

发明人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

IPC分类号： H01L29/73

CPC分类号： H01L29/7304 ,  H01L27/0605 ,  H01L29/7371 ,  H03F2200/444 ,  H03F2203/21178

摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.

摘要翻译： 一种异质结双极晶体管，其具有InGaP作为发射极层，并且具有可靠的导电和热稳定性，其中GaAs层插入在InGaP发射极层和AlGaAs镇流电阻层之间，以防止从基极层反向注入的空穴扩散， 达到AlGaAs镇流电阻层。

公开(公告)号：US06943387B2

公开(公告)日：2005-09-13

申请号：US10409455

申请日：2003-04-09

申请人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

发明人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/423 ,  H01L29/737 ,  H03F1/30 ,  H03F3/19 ,  H01L31/072

CPC分类号： H01L29/66318 ,  H01L29/0692 ,  H01L29/42304 ,  H01L29/7371 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16152 ,  H03F1/302 ,  H03F3/19 ,  H03F2203/21178

摘要： In a semiconductor device using an emitter top heterojunction bipolar transistor having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. This allows reduction of base/collector junction capacitance per unit emitter area, whereby a semiconductor device having high power adding efficiency and high power gain suitable for a power amplifier can be realized. Further, in a multistage power amplifier including first and second amplifier circuits each having one or more of bipolar transistors, a bipolar transistor in the first amplifier circuit uses an emitter having a planar shape in a rectangular shape, and a bipolar transistor in the second amplifier circuit uses an emitter having a ring-like shape and a base electrode only on the inner side of the emitter.

摘要翻译： 在使用具有环状形状的发射极顶面异质结双极晶体管的半导体器件中，提供了仅在环状发射极 - 基极结区域的内侧存在基极的结构。 这允许减小每单位发射极面积的基极/集电极结电容，由此可以实现具有高功率增加效率和适用于功率放大器的高功率增益的半导体器件。 此外，在包括具有一个或多个双极晶体管的第一和第二放大器电路的多级功率放大器中，第一放大器电路中的双极晶体管使用具有矩形形状的平面形状的发射极和第二放大器中的双极晶体管 电路仅在发射体的内侧使用具有环状形状的发射体和基极。

公开(公告)号：US07256434B2

公开(公告)日：2007-08-14

申请号：US11019270

申请日：2004-12-23

申请人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

发明人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

IPC分类号： H01L29/737

CPC分类号： H01L29/7304 ,  H01L27/0605 ,  H01L29/7371 ,  H03F2200/444 ,  H03F2203/21178

摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.

摘要翻译： 一种异质结双极晶体管，其具有InGaP作为发射极层，并且具有可靠的导电和热稳定性，其中GaAs层插入在InGaP发射极层和AlGaAs镇流电阻层之间，以防止从基极层反向注入的空穴扩散， 达到AlGaAs镇流电阻层。

公开(公告)号：US08072001B2

公开(公告)日：2011-12-06

申请号：US12879205

申请日：2010-09-10

申请人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

发明人： Isao Ohbu ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa

IPC分类号： H01L29/73

CPC分类号： H01L29/7304 ,  H01L27/0605 ,  H01L29/7371 ,  H03F2200/444 ,  H03F2203/21178

摘要： A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.

摘要翻译： 一种异质结双极晶体管，其具有InGaP作为发射极层，并且具有可靠的导电和热稳定性，其中GaAs层插入在InGaP发射极层和AlGaAs镇流电阻层之间，以防止从基极层反向注入的空穴扩散， 达到AlGaAs镇流电阻层。