摘要:
An image processing apparatus detects, in step 1, whether or not differences between currently supplied image data and image data of a previous pixel are more than a predetermined value m, and identifies a border of a computer-created image or a natural image, where a brightness level differs from the remaining area of the image, when the differences are more than the predetermined value m. Conversely, when the differences are less than the predetermined value m, the image processing apparatus checks, in step 2, whether image data at a pixel before and a pixel two before the current pixel are identical with respect to the color components constituting the color image. When the differences are not all zero, it is checked whether or not the image data at a pixel before the current pixel and the image data at the current pixel are all zero. When the image data are not identical, the color image is identified as being a natural image. When the image data are identical, the color image is identified as being a computer-created image. In step 3, the computer-created image is checked as to whether it is a 2-pixel checkered image.
摘要:
In the &ggr; correction circuit, a crossover point arithmetic processing unit performs arithmetic processing for each region on crossover points y in the output data direction of a &ggr; correction crossover line based on a plurality of slope data A respectively specified for each of a plurality of regions and crossover point positions X in the input data direction set in advance. A 5-to-4 encoder and a selector select one of a plurality of slope data A respectively specified for each of a plurality of regions and one result B of the results y of arithmetic processing on said crossover points based on the upper bits of input data, a flag encoder and another selector calculate the difference &Dgr;X from a crossover point position in the input data direction to the input data in the region to which input data belongs, and an arithmetic processing unit multiples the above difference &Dgr;X by the selected slope A, adds the multiplication result to the value of the selected crossover point position B in the output data direction, and outputs that value as a &ggr; correction value. Consequently, even if the number of crossover lines for digital &ggr; correction increases, arithmetic processing is simplified. When an image data processing apparatus is used, a pseudo gray scale processing circuit may be provided in a later stage of this &ggr; correction circuit to decrease the number of data bits.
摘要:
A power supply circuit (300) for a display device such as a liquid crystal outputs a boosted supply voltage VDD2 during normal operation, and generates a non-boosted supply voltage VDD2 having a voltage lower than that during the normal display operation by controlling the switches for switching the output within the power supply circuit (300) during a power save mode. The non-boosted supply voltage is supplied to the analog circuits of a driving circuit (100) so that the power consumption at the analog circuits is reduced. By controlling the switch for switching the output within the power supply circuit and the supply of the power supply clock, the circuit can be switched, in the power save mode, to either a mode where a lower supply voltage is generated or to a mode where the power supply is turned off.
摘要:
There is proposed is a method of controlling a flat panel display apparatus for multi-gradation display in which a data determination portion and a subfield control portion are provided. Based on a most significant bit or an upper bit of original image data, it is determined in which one of two or more divided gradation groups the original image data is included, to select a combination of subfields in accordance with a gradation-brightness characteristic of the belonging gradation group. Using a complementary relationship with human visibility, a difference in brightness between the gradations in a low-order brightness region is reduced, and a difference in brightness between the gradations in a high-order brightness region is enlarged. Therefore, a density of brightness is uniformly recognized visually over all the brightness regions, and a good quality of display can be obtained.
摘要:
A driving circuit of a display device such as a liquid crystal generates power supply clocks (1 and 2) based on a system clock during the normal display operation which is not a power save mode. The generated power supply clocks are supplied, directly or after inversion, to the switches (SW1 through SW4 (and SW5 through SW8)) in a charge pump type power supply circuit (300) for switching the connection of capacitors (C1 and C2 (and C11 and C12)) in the power supply circuit (300). In this manner, supply voltages VDD2 and VDD3 which function as the driving power supply for a driving circuit (100) and a display panel (200) can be obtained at the power supply circuit (300) by boosting the input voltage Vin. The driving circuit (100) stops supply of the power supply clocks to the power supply circuit (300) when a transition to the power save mode is instructed and a power save control signal generated by a CPU I/F circuit (16) is changed, thereby suspending generation of the supply voltage an consumption of power consumption at the circuit and display panel.
摘要:
A liquid crystal display apparatus includes a liquid crystal display panel having preset display characteristics, such as image brightness and contrast. A luminescent unit is optically connected with the display panel and provides light to the display panel in order to form an image on the display panel. The luminescent unit includes a light collector which collects ambient light and a light source, for generating light when the amount of ambient light is insufficient to generate a clear image. A control circuit is electrically connected to the display panel and automatically varies the preset display characteristics in accordance with the amount of ambient light collected by the light collector.
摘要:
A mask circuit is provided in a display device having a plurality of pixels. The mask circuit supplies a video signal to each of the pixels in a partial display area selected based on a display area selection signal, and prevents the supply of the video signal to each of the pixels in a background display area. Accordingly, this display device displays an arbitrary pattern at an arbitrary position of the display panel of the display device. In addition, an inverting controlling circuit is provided for inverting the background display signal supplied to each of the pixels in the background display area for each frame. The power consumption of the display device can be reduced.
摘要:
An input digital video signal is allotted by a first multiplexer (310) between regions of a display area to be driven in a dividing manner and is sequentially input to a first memory portion (30A) or a second memory portion (30B). Each of the first and second memory portions (30A and 30B) comprises an input-side line memory (32) composed of, for example, 400-stage input side shift register to which said digital video signal is sequentially input, and an output-side line memory (34) for receiving the data transferred in parallel from the input line memory (32) to serially output the stored data from a selected one of output portions (Out1-4) provided at the 320th, 256th or first stage FF34. The output portion of the memory (34) is thus selected by selectors (380A, 380B) in accordance with the number of pixels in the horizontal direction of the LCD panel, such that LCD panels having the different numbers of pixels can be driven with the same structure. The output-side line memory (34) further includes a data shift direction switching circuit. By controlling the switching circuit and selecting the output at the first stage FF34(Out4) in the 400 stages, the data from the output-side line memory (34) can be output in the order opposite to the input order into the input-side line memory (32).
摘要:
There is provided an image information process apparatus to be applied to a display for displaying bit image display data for each pixel, for enabling the display to display continuous tones in an error diffusion manner based on P bit image data, P being larger than L. This apparatus includes a plurality of adding circuits to which a plurality of P bit image data are concurrently supplied. A predetermined lower bit of an added result at respective adding circuits is used as error data supplied to the next adjacent adding circuit. An error data holding circuit holds a predetermined lower bit of an output from an adding circuit corresponding to the last column pixel in image data supplied. It then supplies the lower bit held to an adding circuit corresponding to the top front column pixel of the image data supplied. With this arrangement, a display which is capable of displaying images based on digital data of a limited number of bits displays in a pseudo manner continuous tones expressed using a higher number of bits than the limited number. In addition, performance and processing speed of image information processing are improved.
摘要:
A liquid crystal display device has a liquid crystal panel, a DA converter for generating a common electrode signal to be applied to a common electrode of a liquid crystal, and a non-volatile memory for encoding an optimum value of the common electrode signal into an ID code and storing the ID code therein. The DA converter generates the optimum common electrode signal corresponding to the ID code read out from the non-volatile memory. A liquid crystal panel manufacturer ships the liquid crystal panel in which the optimum value of the common electrode signal is encoded into the ID code and stored in the non-volatile memory in an inspecting process. The assembling manufacturer using the liquid crystal panel can easily set the optimum value of the common electrode signal. Furthermore, the liquid crystal display device has a CPU decoding the ID code read out from the non-volatile memory. Alternatively, it is possible to supply a data of a value of the common electrode signal to a user of the liquid crystal. The user adjusts the common electrode signal generating circuit by using the data of the value of the common electrode signal.