公开(公告)号：US06751697B1

公开(公告)日：2004-06-15

申请号：US09724201

申请日：2000-11-27

申请人： Hisato Shima ,  Bruce A. Fairman ,  David Vernon James ,  Scott Smyers ,  Glen David Stone ,  Kazonubu Toguchi ,  Richard K. Scheel

发明人： Hisato Shima ,  Bruce A. Fairman ,  David Vernon James ,  Scott Smyers ,  Glen David Stone ,  Kazonubu Toguchi ,  Richard K. Scheel

IPC分类号： G06F1336

CPC分类号： H04L29/12273 ,  H04L12/18 ,  H04L12/185 ,  H04L12/40058 ,  H04L12/40065 ,  H04L12/40071 ,  H04L12/40078 ,  H04L12/40091 ,  H04L12/40117 ,  H04L12/462 ,  H04L12/4625 ,  H04L12/64 ,  H04L29/12254 ,  H04L29/12264 ,  H04L29/12283 ,  H04L29/12301 ,  H04L29/1232 ,  H04L29/12801 ,  H04L41/0896 ,  H04L41/12 ,  H04L45/02 ,  H04L45/48 ,  H04L61/2038 ,  H04L61/2046 ,  H04L61/2053 ,  H04L61/2061 ,  H04L61/2076 ,  H04L61/2092 ,  H04L61/6004

摘要： A method and system for a multi-phase net refresh on a bus bridge interconnect, the interconnect comprising a number of nodes, a bus bridge, and a number of buses, are described. In one embodiment, a primary bus is acquired by communicating with other bus bridges on the buses. A secondary bus is breached to acquire the secondary bus. In addition, the primary bus and the secondary bus are committed.

摘要翻译： 描述了在总线桥互连上的多相网刷新的方法和系统，包括多个节点，总线桥和多个总线的互连。 在一个实施例中，通过与总线上的其它总线桥通信来获取主总线。 二级巴士遭到破坏以获得次级巴士。 此外，主要总线和次要总线也是承诺的。

公开(公告)号：US06901474B2

公开(公告)日：2005-05-31

申请号：US10607071

申请日：2003-06-25

申请人： Kevin K. Lym ,  Hisato Shima ,  Scott Smyers ,  Bruce A. Fairman

发明人： Kevin K. Lym ,  Hisato Shima ,  Scott Smyers ,  Bruce A. Fairman

IPC分类号： G06F13/10 ,  G06F13/28 ,  H04L12/40 ,  H04L12/56 ,  H04L12/64 ,  H04L29/08 ,  G06F13/00 ,  G06F13/38 ,  G06F13/40

CPC分类号： H04L49/9031 ,  G06F13/10 ,  G06F13/102 ,  G06F13/28 ,  H04L12/40058 ,  H04L12/40065 ,  H04L12/40123 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9047 ,  H04L69/32

摘要： In a first embodiment, an applications programming interface (API) implements and manages isochronous and asychronous data transfer operations between an application and a bus structure. During an asynchronous transfer the API includes the ability to transfer any amount of data between one or more local data buffers within the application and a range of addresses over the bus structure using one or more asynchronous transactions. An automatic transaction generator may be used to automatically generate the transactions necessary to complete the data transfer. The API also includes the ability to transfer data between the application and another node on the bus structure isochronously over a dedicated channel. During an isochronous data transfer, a buffer management scheme is used to manage a linked list of data buffer descriptors. During isochronous transfer of data, the API provides implementation of a resynchronization event in the stream of data allowing for resynchronization by the application to a specific point within the data. Implementation is also provided for a callback routine for each buffer in the list which calls the application at a predetermined point during the transfer of data. An isochronous API of the preferred embodiment presents a virtual representation of a plug, using a plug handle, to the application. The isochronous API notifies a client application of any state changes on a connected plug through the event handle. The isochronous API also manages buffers utilized during a data operation by attaching and detaching the buffers to the connected plug, as appropriate, to mange the data flow.

摘要翻译： 在第一实施例中，应用程序编程接口（API）实现和管理应用程序和总线结构之间的同步和异步数据传输操作。 在异步传输期间，API包括在应用程序内的一个或多个本地数据缓冲器和使用一个或多个异步事务的总线结构上的地址范围之间传送任何数量的数据的能力。 自动交易发生器可用于自动生成完成数据传输所需的交易。 API还包括通过专用信道等时地在应用程序和总线结构上的另一个节点之间传输数据的能力。 在同步数据传输期间，使用缓冲器管理方案来管理数据缓冲区描述符的链表。 在数据的同步传输期间，API提供数据流中的重新同步事件的实现，允许应用程序重新同步到数据内的特定点。 还提供了用于在数据传送期间在预定点调用应用的列表中的每个缓冲器的回调例程的实现。 优选实施例的同步API使用插头手柄呈现应用程序的插头的虚拟表示。 同步API通过事件句柄向客户端应用程序通知连接的插头上的任何状态更改。 同步API还管理在数据操作期间利用的缓冲器，以适当地将缓冲器附接和分离到连接的插头以管理数据流。

公开(公告)号：US07577782B2

公开(公告)日：2009-08-18

申请号：US11002048

申请日：2004-12-01

申请人： Kevin K. Lym ,  Hisato Shima ,  Scott Smyers ,  Bruce A. Fairman

发明人： Kevin K. Lym ,  Hisato Shima ,  Scott Smyers ,  Bruce A. Fairman

IPC分类号： G06F13/20

CPC分类号： G06F13/10 ,  G06F13/102 ,  G06F13/28 ,  H04L12/40058 ,  H04L12/40065 ,  H04L12/40123 ,  H04L49/90 ,  H04L49/901 ,  H04L69/32

摘要： In a first embodiment, an applications programming interface (API) implements and manages isochronous and asynchronous data transfer operations between an application and a bus structure. During an synchronous transfer the API includes the ability to transfer any amount of data between one or more local data buffers within the application and a range of addresses over the bus structure using one or more asynchronous transactions. An automatic transaction generator may be used to automatically generate the transactions necessary to complete the data transfer. The API also includes the ability to transfer data between the application and another node on the bus structure isochronously over a dedicated channel. During an isochronous data transfer, a buffer management scheme is used to manage a linked list of data buffer descriptors. During isochronous transfers of data, the API provides implementation of a resynchronization event in the stream of data allowing for resynchronization by the application to a specific point within the data. Implementation is also provided for a callback routine for each buffer in the list which calls the application at a predetermined point during the transfer of data. An isochronous API of the preferred embodiment presents a virtual representation of a plug, using a plug handle, to the application. The isochronous API notifies a client application of any state changes on a connected plug through the event handle. The isochronous API also manages buffers utilized during a data operation by attaching and detaching the buffers to the connected plug, as appropriate, to manage the data flow.

摘要翻译： 在第一实施例中，应用编程接口（API）实现和管理应用和总线结构之间的等时和异步数据传输操作。 在同步传输期间，API包括在应用程序内的一个或多个本地数据缓冲器和使用一个或多个异步事务的总线结构上的地址范围之间传送任何数量的数据的能力。 自动交易发生器可用于自动生成完成数据传输所需的交易。 API还包括通过专用信道等时地在应用程序和总线结构上的另一个节点之间传输数据的能力。 在同步数据传输期间，使用缓冲器管理方案来管理数据缓冲区描述符的链表。 在数据的同步传输期间，API提供数据流中的再同步事件的实现，允许应用程序重新同步到数据内的特定点。 还提供了用于在数据传送期间在预定点调用应用的列表中的每个缓冲器的回调例程的实现。 优选实施例的同步API使用插头手柄呈现应用程序的插头的虚拟表示。 同步API通过事件句柄向客户端应用程序通知连接的插头上的任何状态更改。 等时API还管理在数据操作期间利用的缓冲器，以适当地将缓冲器附接到连接的插头并管理数据流。

公开(公告)号：US06631435B1

公开(公告)日：2003-10-07

申请号：US09607134

申请日：2000-06-29

申请人： Kevin K. Lym ,  Hisato Shima ,  Scott Smyers ,  Bruce A. Fairman

发明人： Kevin K. Lym ,  Hisato Shima ,  Scott Smyers ,  Bruce A. Fairman

IPC分类号： G06F1300

CPC分类号： H04L49/9031 ,  G06F13/10 ,  G06F13/102 ,  G06F13/28 ,  H04L12/40058 ,  H04L12/40065 ,  H04L12/40123 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9047 ,  H04L69/32

摘要： In a first embodiment, an applications programming interface (API) implements and manages isochronous and asynchronous data transfer operations between an application and a bus structure. During an asynchronous transfer the API includes the ability to transfer any amount of data between one or more local data buffers within the application and a range of addresses over the bus structure using one or more, asynchronous transactions. An automatic transaction generator may be used to automatically generate the transactions necessary to complete the data transfer. The API also includes the ability to transfer data between the application and another node on the bus structure isochronously over a dedicated channel. During an isochronous data transfer, a buffer management scheme is used to manage a linked list of data buffer descriptors. During isochronous transfers of data, the API provides implementation of a resynchronization event in the stream of data allowing for resynchronization by the application to a specific point within the data. Implementation is also provided for a callback routine for each buffer in the list which calls the application at a predetermined point during the transfer of data. An isochronous API of the preferred embodiment presents a virtual representation of a plug, using a plug handle, to the application. The isochronous API notifies a client application of any state changes on a connected plug through the event handle. The isochronous API also manages buffers utilized during a data operation by attaching and detaching the buffers to the connected plug, as appropriate, to manage the data flow.

摘要翻译： 在第一实施例中，应用编程接口（API）实现和管理应用和总线结构之间的等时和异步数据传输操作。 在异步传输期间，API包括在应用程序内的一个或多个本地数据缓冲区之间传输任何数量的数据的能力，以及使用一个或多个异步事务通过总线结构的一系列地址。 自动交易发生器可用于自动生成完成数据传输所需的交易。 API还包括通过专用信道等时地在应用程序和总线结构上的另一个节点之间传输数据的能力。 在同步数据传输期间，使用缓冲器管理方案来管理数据缓冲区描述符的链表。 在数据的同步传输期间，API提供数据流中的再同步事件的实现，允许应用程序重新同步到数据内的特定点。 还提供了用于在数据传送期间在预定点调用应用的列表中的每个缓冲器的回调例程的实现。 优选实施例的同步API使用插头手柄呈现应用程序的插头的虚拟表示。 同步API通过事件句柄向客户端应用程序通知连接的插头上的任何状态更改。 等时API还管理在数据操作期间利用的缓冲器，以适当地将缓冲器附接到连接的插头并管理数据流。

公开(公告)号：US06169745A

公开(公告)日：2001-01-02

申请号：US09336064

申请日：1999-06-18

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

IPC分类号： G06F1334

CPC分类号： H04L12/40058 ,  G06F9/3806 ,  G06F9/4486

摘要： A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch. The program counter select outputs a switch address, a return address, or a next consecutive address to select the appropriate instruction in the memory for execution by the processor.

摘要翻译： 一种用于电子网络中的多级上下文切换的系统和方法，包括配置成实现数据优先方案的控制状态机，被配置为根据数据优先级方案保存和释放中断的指令模块的返回地址的返回地址发生器，以及 来自电子网络的上下文信息，以及被配置为根据数据优先级方案和上下文信息来处理来自电子网络的数据的处理器。 接收寄存器存储从电子网络接收的数据。 控制状态机包括切换地址发生器和程序计数器选择。 开关地址产生器输出开关地址，该开关地址是用于所选上下文指令模块的第一指令的地址。 返回地址生成器保存并释放当上下文切换中断指令模块时的返回地址，后者是下一个连续指令的地址。 程序计数器选择输出开关地址，返回地址或下一个连续地址，以选择存储器中适当的指令以供处理器执行。

公开(公告)号：US06519265B1

公开(公告)日：2003-02-11

申请号：US09322632

申请日：1999-05-28

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

IPC分类号： G06F1334

CPC分类号： H04L12/40058 ,  G06F9/461 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9063

摘要： A system and method for context switching in an electronic network comprises a memory configured to store instruction modules, each instruction module corresponding to a context, a processor that executes the instruction modules, and a control state machine. The control state machine selects one of the instruction modules for execution by the processor according to context information from the electronic network. The control state machine includes a switch address generator, a return address register, and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address register stores a return address, which is an address of a next consecutive instruction, when an instruction module is interrupted for a context switch. The program counter select outputs the switch address, the return address, or a next consecutive address to select the appropriate instruction in the memory for execution by the processor.

摘要翻译： 一种用于电子网络中的上下文切换的系统和方法包括：存储器，被配置为存储指令模块，每个指令模块对应于上下文，执行指令模块的处理器和控制状态机。 控制状态机根据来自电子网络的上下文信息来选择处理器执行的指令模块之一。 控制状态机包括开关地址发生器，返回地址寄存器和程序计数器选择。 开关地址产生器输出开关地址，该开关地址是用于所选上下文指令模块的第一指令的地址。 返回地址寄存器当指令模块被中断以进行上下文切换时，存储作为下一个连续指令的地址的返回地址。 程序计数器选择输出开关地址，返回地址或下一个连续地址，以选择存储器中适当的指令以供处理器执行。

公开(公告)号：US06667988B1

公开(公告)日：2003-12-23

申请号：US09638659

申请日：2000-08-14

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham ,  Jose L. Diaz ,  Richard A. Bardini

IPC分类号： H04L1266

CPC分类号： H04L12/40058 ,  G06F9/3806 ,  G06F9/4486

摘要： A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch. The program counter select outputs a switch address, a return address, or a next consecutive address to select the appropriate instruction in the memory for execution by the processor.

摘要翻译： 一种用于电子网络中的多级上下文切换的系统和方法，包括配置成实现数据优先方案的控制状态机，被配置为根据数据优先级方案保存和释放中断的指令模块的返回地址的返回地址发生器，以及 来自电子网络的上下文信息，以及被配置为根据数据优先级方案和上下文信息来处理来自电子网络的数据的处理器。 接收寄存器存储从电子网络接收的数据。 控制状态机包括开关地址发生器和程序计数器选择。 开关地址产生器输出开关地址，该开关地址是用于所选上下文指令模块的第一指令的地址。 返回地址生成器保存并释放当上下文切换中断指令模块时的返回地址，后者是下一个连续指令的地址。 程序计数器选择输出开关地址，返回地址或下一个连续地址，以选择存储器中适当的指令以供处理器执行。

公开(公告)号：US06535940B1

公开(公告)日：2003-03-18

申请号：US09363086

申请日：1999-07-28

申请人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham

发明人： Jung-Jen Liu ,  Scott Smyers ,  Bruce A. Fairman ,  Steve Pham

IPC分类号： G06F13372

CPC分类号： H04L12/40058 ,  G06F9/30032 ,  G06F9/3879 ,  H04L12/40117

摘要： A system and method for fast data transfers in an electronic network comprises a data transfer engine configured to independently execute data transfer instructions and a processor configured to forward the data transfer instructions to the data transfer engine. The data transfer engine preferably executes the data transfer instructions while the processor proceeds to execute a next instruction. The data transfer engine includes a transmit engine that executes transmit transfer instructions and a receive engine that executes receive transfer instructions. The transmit engine and the receive engine operate independently and thus may operate concurrently.

摘要翻译： 一种用于电子网络中快速数据传输的系统和方法，包括被配置为独立地执行数据传输指令的数据传输引擎和被配置为将数据传输指令转发到数据传输引擎的处理器。 数据传输引擎优选地在处理器执行下一条指令时执行数据传输指令。 数据传输引擎包括执行发送传送指令的发送引擎和执行接收转移指令的接收引擎。 传输引擎和接收引擎独立运行，因此可以同时运行。

公开(公告)号：US6167471A

公开(公告)日：2000-12-26

申请号：US172994

申请日：1998-10-14

申请人： Jung-Jen Liu ,  Bruce A. Fairman

发明人： Jung-Jen Liu ,  Bruce A. Fairman

IPC分类号： G06F13/12 ,  H04L12/28 ,  H04L12/56 ,  G06F13/10 ,  G06F9/30 ,  G11C8/00 ,  H04J3/26

CPC分类号： H04L49/90

摘要： An apparatus for dispatching a processing element to a program location based on a channel number of received data includes a channel pointer register having a number of storage locations each with a channel number field, a valid bit field and a corresponding instruction pointer field. When an isochronous channel is allocated for use for reception, the host device programs the channel number and a corresponding instruction pointer value into a storage location. When a storage location is programmed, a valid bit within that storage location is also preferably set. The corresponding instruction pointer value points to a series of instructions which are to be used to process data received on that isochronous channel. When isochronous data is then received, the channel number on which the data is received is compared to the channel numbers within the valid storage locations in the channel pointer register. If one of the channel numbers within a valid storage location matches the channel number of the received data, then the corresponding instruction pointer value is output and the data is processed according to a series of instructions beginning at the location specified by the corresponding instruction pointer value. Otherwise, if the channel number of the received data does not match any of the channel numbers within valid storage locations then a default instruction pointer value is output and the received data is processed according to a series of instructions beginning at the location specified by the default instruction pointer value.

摘要翻译： 一种用于基于接收数据的频道号将处理元件分配到节目位置的装置包括具有多个存储位置的频道指针寄存器，每个存储位置具有频道号字段，有效位字段和相应的指令指针字段。 当同步信道被分配用于接收时，主机设备将信道号和相应的指令指针值编程到存储位置。 当存储位置被编程时，也优选地设置该存储位置内的有效位。 相应的指令指针值指向要用于处理在同步信道上接收的数据的一系列指令。 当接收到等时数据时，将接收数据的通道号与通道指针寄存器中的有效存储位置内的通道号进行比较。 如果有效存储位置中的一个通道号与接收到的数据的通道号匹配，则输出相应的指令指针值，并根据从相应指令指针值指定的位置开始的一系列指令来处理数据 。 否则，如果接收到的数据的通道号与有效存储位置内的任何通道号不匹配，则输出默认指令指针值，并根据从默认值指定的位置开始的一系列指令来处理接收到的数据 指令指针值。

公开(公告)号：US4979054A

公开(公告)日：1990-12-18

申请号：US160501

申请日：1988-02-25

申请人： Robert B. McCullough ,  Robert G. Taylor, Jr. ,  Glenn M. Stark ,  William G. Swinton ,  Bruce A. Fairman

发明人： Robert B. McCullough ,  Robert G. Taylor, Jr. ,  Glenn M. Stark ,  William G. Swinton ,  Bruce A. Fairman

IPC分类号： G06F3/06 ,  G11B19/02 ,  G11B20/12

CPC分类号： G06F3/0601 ,  G11B19/02 ,  G11B20/1252 ,  G06F2003/0692 ,  G11B2220/20

摘要： A disk drive system includes a disk controller system having separate head positioning and data transfer subsystems and supporting up to four disk drives, two of which may be removable and two of which may connect through a standard ST506 interface. The system provides a read and write protected cylinder for removable drives, a read only cylinder for removable drives which may store a unique serial number as well as other write protected data, and a high capacity, high speed sector buffer which allows continuous transfers of data to or from noninterleaved sectors and supports concurrent disk and system accesses.

摘要翻译： 磁盘驱动器系统包括具有单独的磁头定位和数据传输子系统的磁盘控制器系统，并且支持多达四个磁盘驱动器，其中两个磁盘驱动器可以是可移动的，其中两个可以通过标准ST506接口连接。 该系统为可移动驱动器提供读写保护的气缸，用于可存储唯一序列号以及其他写保护数据的可移动驱动器的只读柱，以及允许连续传输数据的高容量，高速扇区缓冲器 到或来自非交织扇区，并支持并发磁盘和系统访问。