公开(公告)号：US20180061498A1

公开(公告)日：2018-03-01

申请号：US15556680

申请日：2015-06-19

申请人： Hitachi, Ltd.

发明人： Yohei HAZAMA ,  Junji OGAWA ,  Kenta NINOSE

IPC分类号： G11C16/26 ,  G11C16/34 ,  G11C11/56 ,  G06F11/10 ,  G06F3/06

CPC分类号： G11C16/26 ,  G06F3/067 ,  G06F3/0688 ,  G06F11/1048 ,  G06F11/1068 ,  G06F11/1076 ,  G06F12/16 ,  G11C11/5642 ,  G11C16/349 ,  G11C2211/5648

摘要： A flash memory controller is configured to hold a read pattern defining an order of selection of read options specifying a parameter value for a read from the flash memory chip. The flash memory controller is configured to execute error correction on data read from the flash memory chip in accordance with the read command. The flash memory controller is configured to designate a next read option specified in the read pattern to read the data from the flash memory chip in a case where all errors in the read data are not corrected by the error correction.