Processor and method of performing speculative load operations of the processor
    1.
    发明授权
    Processor and method of performing speculative load operations of the processor 有权
    处理器和执行处理器的推测加载操作的方法

    公开(公告)号:US08443174B2

    公开(公告)日:2013-05-14

    申请号:US11838488

    申请日:2007-08-14

    IPC分类号: G06F9/30 G06F9/312

    CPC分类号: G06F9/3842

    摘要: Provided is a processor and method of performing speculative load instructions of the processor in which a load instruction is performed only in the case where the load instruction substantially accesses a memory. A load instruction for canceling operations is performed in other cases except the above case, so that problems occurring by accessing an input/output (I/O) mapped memory area and the like at the time of performing speculative load instructions can be prevented using only a software-like method, thereby improving the performance of a processor.

    摘要翻译: 提供了一种执行处理器的推测性加载指令的处理器和方法,其中仅在加载指令基本访问存储器的情况下执行加载指令。 在除了上述情况之外的其他情况下执行用于取消操作的加载指令,使得仅在执行推测性加载指令时访问输入/输出(I / O)映射存储区等而出现的问题可以仅被使用 一种类似软件的方法,从而提高处理器的性能。

    PROCESSOR AND METHOD OF PERFORMING SPECULATIVE LOAD OPERATIONS OF THE PROCESSOR
    2.
    发明申请
    PROCESSOR AND METHOD OF PERFORMING SPECULATIVE LOAD OPERATIONS OF THE PROCESSOR 有权
    处理器的执行和执行分析负载运算的方法

    公开(公告)号:US20080209188A1

    公开(公告)日:2008-08-28

    申请号:US11838488

    申请日:2007-08-14

    IPC分类号: G06F9/38

    CPC分类号: G06F9/3842

    摘要: Provided is a processor and method of performing speculative load instructions of the processor in which a load instruction is performed only in the case where the load instruction substantially accesses a memory. A load instruction for canceling operations is performed in other cases except the above case, so that problems occurring by accessing an input/output (I/O) mapped memory area and the like at the time of performing speculative load instructions can be prevented using only a software-like method, thereby improving the performance of a processor.

    摘要翻译: 提供了一种执行处理器的推测性加载指令的处理器和方法,其中仅在加载指令基本访问存储器的情况下执行加载指令。 在除了上述情况之外的其他情况下执行用于取消操作的加载指令,使得仅在执行推测性加载指令时访问输入/输出(I / O)映射存储区等而出现的问题可以仅被使用 一种类似软件的方法,从而提高处理器的性能。

    Memory access method using three dimensional address mapping
    3.
    发明授权
    Memory access method using three dimensional address mapping 有权
    内存访问方法使用三维地址映射

    公开(公告)号:US07779225B2

    公开(公告)日:2010-08-17

    申请号:US11828440

    申请日:2007-07-26

    IPC分类号: G06F12/00

    摘要: A memory access method includes: obtaining a, b, and c from a program code for accessing a memory with a triple loop in a program, a being a number of values which an inner-most loop variable of the triple loop may have, b being a number of values which a middle loop variable of the triple loop may have, and c being a number of values which an outer-most loop variable of the triple loop may have; obtaining a starting address of the memory accessed by the triple loop; and obtaining an a×b×c number of addresses of the memory accessed by the triple loop using the starting address and a function.

    摘要翻译: 存储器访问方法包括:从程序中用于访问具有三重循环的存储器的程序代码获取a,b和c,所述三循环的最内循环变量可以具有多个值,b 是三重循环的中间循环变量可能具有的多个值,c是三重循环的最外圈循环变量可能具有的值的数量; 获取由三重循环访问的存储器的起始地址; 并使用起始地址和功能获得由三重回路访问的存储器的a×b×c个地址。

    Loop coalescing method and loop coalescing device
    4.
    发明授权
    Loop coalescing method and loop coalescing device 有权
    循环聚结方法和回路聚结装置

    公开(公告)号:US08549507B2

    公开(公告)日:2013-10-01

    申请号:US11843357

    申请日:2007-08-22

    IPC分类号: G06F9/45

    CPC分类号: G06F8/4441

    摘要: A loop coalescing method and a loop coalescing device are disclosed. The loop coalescing method comprises removing an inner-most loop from among nested loops, so that an outer operation provided outside of the inner-most loop is performed when a condition of a conditional statement is satisfied, generating a guard code by applying an if-conversion method to the conditional statement, and converting a guard by using an instruction calculating the guard of the guard code, the instruction calculating the guard using a register where information related to a period of time corresponding to the number of iterations of the inner-most loop is stored.

    摘要翻译: 公开了一种环路聚结方法和回路聚结装置。 循环合并方法包括从嵌套循环中去除最内循环,使得当满足条件语句的条件时,执行在最内循环之外提供的外部操作,通过应用if- 转换方法到条件语句,并且通过使用计算保护码的保护的指令来转换保护,所述指令使用寄存器计算所述保护器,所述寄存器的信息与对应于最内层次的迭代次数相关的时间段 循环被存储。

    Apparatus for compressing instruction word for parallel processing VLIW computer and method for the same
    5.
    发明授权
    Apparatus for compressing instruction word for parallel processing VLIW computer and method for the same 有权
    用于并行处理VLIW计算机的指令字的压缩装置及其方法

    公开(公告)号:US07774581B2

    公开(公告)日:2010-08-10

    申请号:US11838511

    申请日:2007-08-14

    IPC分类号: G06F9/30

    摘要: An apparatus and a method are provided for a parallel processing very long instruction word (VLIW) computer. The apparatus includes: an index code generation unit sequentially generating an index code, which is associated with a number of no operation (NOP) instruction word between effective instruction words, with respect to each of instruction word groups to be executed in a VLIW computer; an instruction compression unit sequentially deleting the NOP instruction word which corresponds to the index code with respect to each of instruction word groups; and an instruction word conversion unit converting the effective instruction words to include the index code, the effective instruction words corresponding to the NOP instruction words.

    摘要翻译: 为并行处理非常长的指令字(VLIW)计算机提供了一种装置和方法。 该装置包括:索引代码生成单元,相对于要在VLIW计算机中执行的每个指令字组,顺序生成与有效指令字之间的无操作数(NOP)指令字数相关联的索引码; 指令压缩单元相对于每个指令字组顺序地删除对应于索引代码的NOP指令字; 以及指令字转换单元,将有效指令字转换为包括索引代码,与NOP指令字对应的有效指令字。

    Method of sharing coarse grained array and processor using the method
    6.
    发明授权
    Method of sharing coarse grained array and processor using the method 有权
    使用该方法共享粗粒数组和处理器的方法

    公开(公告)号:US08281107B2

    公开(公告)日:2012-10-02

    申请号:US12032709

    申请日:2008-02-18

    IPC分类号: G06F15/00

    摘要: A method of sharing a coarse grained array and a processor using the method is provided. A processor includes a first processor core including a plurality of first functional units which execute a first instruction set, a second processor core including a plurality of second functional units which execute a second instruction set, and a coarse grained array including a plurality of third functional units which execute a portion of instructions of the first instruction set and/or the second instruction set, instead of the first processor core and/or the second processor core.

    摘要翻译: 提供了一种共享粗粒度阵列的方法和使用该方法的处理器。 处理器包括第一处理器核心,其包括执行第一指令集的多个第一功能单元,包括执行第二指令集的多个第二功能单元的第二处理器核心和包括多个第三功能块的粗粒度阵列 执行第一指令集和/或第二指令集的指令的一部分的单元,而不是第一处理器核和/或第二处理器核。

    METHOD OF SHARING COARSE GRAINED ARRAY AND PROCESSOR USING THE METHOD
    7.
    发明申请
    METHOD OF SHARING COARSE GRAINED ARRAY AND PROCESSOR USING THE METHOD 有权
    使用该方法共享粗粒度阵列和处理器的方法

    公开(公告)号:US20090055626A1

    公开(公告)日:2009-02-26

    申请号:US12032709

    申请日:2008-02-18

    IPC分类号: G06F15/76 G06F9/30

    摘要: A method of sharing a coarse grained array and a processor using the method is provided. A processor includes a first processor core including a plurality of first functional units which execute a first instruction set, a second processor core including a plurality of second functional units which execute a second instruction set, and a coarse grained array including a plurality of third functional units which execute a portion of instructions of the first instruction set and/or the second instruction set, instead of the first processor core and/or the second processor core.

    摘要翻译: 提供了一种共享粗粒度阵列的方法和使用该方法的处理器。 处理器包括第一处理器核心,其包括执行第一指令集的多个第一功能单元,包括执行第二指令集的多个第二功能单元的第二处理器核心和包括多个第三功能块的粗粒度阵列 执行第一指令集和/或第二指令集的指令的一部分的单元,而不是第一处理器核和/或第二处理器核。

    Glass powder and method of manufacturing the same
    10.
    发明授权
    Glass powder and method of manufacturing the same 有权
    玻璃粉及其制造方法

    公开(公告)号:US08618005B2

    公开(公告)日:2013-12-31

    申请号:US13103685

    申请日:2011-05-09

    IPC分类号: C03C8/02 C03C3/089

    摘要: Provided are a glass powder represented as aLi2O-bK2O-cBaO-dB2O3-eSiO2wherein a+b+c+d+e=1, and 0.01≦a≦0.1, 0.01≦b≦0.1, 0.01≦c≦0.1, 0.05≦d≦0.3, and 0.3≦e≦0.7 are satisfied in terms of mol %, a method of manufacturing the same, and a multi-layered ceramic material using the same. Therefore, a nano glass powder having an average particle size of 100nm or less and uniform particle size distribution can be manufactured using liquid phase deposition, specifically, a sol-gel method. In addition, the glass powder can be used as sintering additives to decrease a sintering temperature by about 100° C. in comparison with conventional glass upon manufacture of a ceramic material such as MLCC and MLCI, which can be sintered at a low temperature, contributing to improvement of dielectric capacity and inductance capacity of the parts and increasing quality coefficient.

    摘要翻译: 提供一种表示为Li 2 O-bK​​ 2 O-cBaO-dB 2 O 3 -eSiO 2的玻璃粉末,其中a + b + c + d + e = 1,和0.01 @ a @ 0.1,01 @ b @ 0.1,01 @ c @ 0.1,0.05@d 以0.3%,0.3≤e≤0.7,以摩尔%表示,其制造方法和使用其的多层陶瓷材料。 因此,平均粒径为100nm以下且粒径分布均匀的纳米玻璃粉末可以使用液相沉积,特别是溶胶 - 凝胶法制造。 此外,与常规玻璃相比,玻璃粉末可以用作烧结添加剂以将烧结温度降低约100℃,而陶瓷材料如MLCC和MLCI可以在低温下烧结而成 提高零件的介电容量和电感量,提高品质系数。