Poly-etching method for split gate flash memory cell
    1.
    发明授权
    Poly-etching method for split gate flash memory cell 有权
    分离栅闪存单元的多层蚀刻方法

    公开(公告)号:US07101758B2

    公开(公告)日:2006-09-05

    申请号:US10686079

    申请日:2003-10-15

    IPC分类号: H01L21/8247

    摘要: A method for forming triple polysilicon split gate electrodes in a EEPROM flash memory array providing a first gate structure; blanket depositing a first polysilicon layer over the first gate structure; etching back the first polysilicon layer according to a first dry etching process; blanket depositing a second dielectric insulating layer over the first polysilicon layer; blanket depositing a second polysilicon layer over the second dielectric insulating layer; and, lithographically patterning and dry etching according to a respective third and fourth dry etching process through a thickness portion of the respective second and first polysilicon layers to respectively form third and second polysilicon gate electrodes.

    摘要翻译: 一种在提供第一栅极结构的EEPROM快闪存储器阵列中形成三重多晶硅分离栅电极的方法; 在第一栅极结构上覆盖沉积第一多晶硅层; 根据第一干蚀刻工艺蚀刻第一多晶硅层; 在所述第一多晶硅层上方覆盖沉积第二介电绝缘层; 在所述第二介电绝缘层上铺设第二多晶硅层; 以及根据相应的第三和第四干蚀刻工艺通过相应的第二和第一多晶硅层的厚度部分进行光刻图案化和干蚀刻,以分别形成第三和第二多晶硅栅电极。

    Poly-etching method for split gate flash memory cell
    2.
    发明申请
    Poly-etching method for split gate flash memory cell 有权
    分离栅闪存单元的多层蚀刻方法

    公开(公告)号:US20050202631A1

    公开(公告)日:2005-09-15

    申请号:US10686079

    申请日:2003-10-15

    IPC分类号: H01L21/336

    摘要: A method for forming triple polysilicon split gate electrodes in a EEPROM flash memory array providing a first gate structure; blanket depositing a first polysilicon layer over the first gate structure; etching back the first polysilicon layer according to a first dry etching process; blanket depositing a second dielectric insulating layer over the first polysilicon layer; blanket depositing a second polysilicon layer over the second dielectric insulating layer; and, lithographically patterning and dry etching according to a respective third and fourth dry etching process through a thickness portion of the respective second and first polysilicon layers to respectively form third and second polysilicon gate electrodes.

    摘要翻译: 一种在提供第一栅极结构的EEPROM快闪存储器阵列中形成三重多晶硅分离栅电极的方法; 在第一栅极结构上覆盖沉积第一多晶硅层; 根据第一干蚀刻工艺蚀刻第一多晶硅层; 在所述第一多晶硅层上方覆盖沉积第二介电绝缘层; 在所述第二介电绝缘层上铺设第二多晶硅层; 以及根据相应的第三和第四干蚀刻工艺通过相应的第二和第一多晶硅层的厚度部分进行光刻图案化和干蚀刻,以分别形成第三和第二多晶硅栅电极。

    QUALITATIVE FAULT DETECTION AND CLASSIFICATION SYSTEM FOR TOOL CONDITION MONITORING AND ASSOCIATED METHODS
    6.
    发明申请
    QUALITATIVE FAULT DETECTION AND CLASSIFICATION SYSTEM FOR TOOL CONDITION MONITORING AND ASSOCIATED METHODS 有权
    用于工具条件监测和相关方法的定性故障检测和分类系统

    公开(公告)号:US20140067324A1

    公开(公告)日:2014-03-06

    申请号:US13603079

    申请日:2012-09-04

    IPC分类号: G06F15/00

    摘要: The present disclosure provides various methods for tool condition monitoring, including systems for implementing such monitoring. An exemplary method includes receiving data associated with a process performed on wafers by an integrated circuit manufacturing process tool; and monitoring a condition of the integrated circuit manufacturing process tool using the data. The monitoring includes evaluating the data based on an abnormality identification criterion, an abnormality filtering criterion, and an abnormality threshold to determine whether the data meets an alarm threshold. The method may further include issuing an alarm when the data meets the alarm threshold.

    摘要翻译: 本公开提供了用于工具状态监测的各种方法,包括用于实现这种监视的系统。 一种示例性方法包括:通过集成电路制造工艺工具接收与在晶片上执行的处理相关联的数据; 以及使用该数据来监视集成电路制造工艺工具的状态。 监视包括基于异常识别标准,异常过滤标准和异常阈值来评估数据,以确定数据是否满足报警阈值。 该方法还可以包括当数据满足报警阈值时发出报警。

    METHOD AND SYSTEM FOR TOOL CONDITION MONITORING
    7.
    发明申请
    METHOD AND SYSTEM FOR TOOL CONDITION MONITORING 审中-公开
    工具条件监测方法与系统

    公开(公告)号:US20130150997A1

    公开(公告)日:2013-06-13

    申请号:US13314850

    申请日:2011-12-08

    IPC分类号: G06F19/00

    摘要: A method and system for removing control action effects from inline measurement data for tool condition monitoring is disclosed. An exemplary method includes determining a control action effect that contributes to an inline measurement, wherein the inline measurement indicates a wafer characteristic of a wafer processed by a process tool; and evaluating the inline measurement without the control action effect contribution to determine a condition of the process tool.

    摘要翻译: 公开了一种用于从刀具状态监测的在线测量数据中去除控制动作效果的方法和系统。 一种示例性方法包括确定有助于在线测量的控制动作效果,其中在线测量指示由处理工具处理的晶片的晶片特性; 并且在没有控制动作效应贡献的情况下评估在线测量来确定过程工具的状况。

    SYSTEM AND METHOD FOR DATA MINING AND FEATURE TRACKING FOR FAB-WIDE PREDICTION AND CONTROL
    8.
    发明申请
    SYSTEM AND METHOD FOR DATA MINING AND FEATURE TRACKING FOR FAB-WIDE PREDICTION AND CONTROL 有权
    用于数据挖掘和特征跟踪的系统和方法,用于FAB-WIDE预测和控制

    公开(公告)号:US20110320026A1

    公开(公告)日:2011-12-29

    申请号:US12823351

    申请日:2010-06-25

    IPC分类号: G06F19/00

    摘要: System and method for data mining and feature tracking for fab-wide prediction and control are described. One embodiment is a system comprising a database for storing raw wafer manufacturing data; a data mining module for processing the raw wafer manufacturing data to select the best data therefrom in accordance with at least one of a plurality of knowledge-, statistic-, and effect-based processes; and a feature tracking module associated with the data mining module and comprising a self-learning model wherein a sensitivity of the self-learning model is dynamically tuned to meet real-time production circumstances, the feature tracking module receiving the selected data from the data mining module and generating prediction and control data therefrom; wherein the prediction and control data are used to control future processes in the wafer fabrication facility.

    摘要翻译: 描述了用于晶圆厂预测和控制的数据挖掘和特征跟踪的系统和方法。 一个实施例是包括用于存储原始晶片制造数据的数据库的系统; 数据挖掘模块,用于根据多个基于知识,统计和效果的过程中的至少一个来处理原始晶片制造数据以从其中选择最佳数据; 以及与数据挖掘模块相关联并包括自学习模型的特征跟踪模块,其中自学习模型的灵敏度被动态调整以满足实时生产环境,特征跟踪模块从数据挖掘接收所选数据 模块并从其生成预测和控制数据; 其中预测和控制数据用于控制晶片制造设备中的未来工艺。