公开(公告)号：US20160232166A1

公开(公告)日：2016-08-11

申请号：US15133446

申请日：2016-04-20

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jiaxing Shi ,  Jun Li ,  Fan Fang

IPC: G06F17/30

CPC classification number: G06F16/122 ,  G06F16/13 ,  G06F16/14 ,  G06F16/148 ,  G06F16/156 ,  G06F16/22

Abstract: A method and an apparatus for accessing a file, where the method includes that a file system receives a file access request from an application layer, acquires metadata of a file when the file access request is to acquire content of the file according to a query condition, where the metadata of the file includes index information of the file, and the query condition is used to select content of the file with respect to the index information of the file, determining, according to the index information of the file, content that is of the file and that meets the query condition, and acquiring, using a magnetic disk input/output controller, all content that is of the file and that meets the query condition such that the application layer accesses the file, and hence the memory usage is reduced by means of filtering out a part of data.

Abstract translation: 一种用于访问文件的方法和装置，其中所述方法包括文件系统从应用层接收文件访问请求，当文件访问请求根据查询条件获取文件的内容时，获取文件的元数据 其中文件的元数据包括文件的索引信息，并且使用查询条件来相对于文件的索引信息选择文件的内容，根据文件的索引信息确定是 的文件，并且满足查询条件，并且使用磁盘输入/输出控制器获取所有文件的内容并且满足查询条件，使得应用层访问该文件，因此存储器使用是 通过过滤掉一部分数据来减少。

公开(公告)号：US10467179B2

公开(公告)日：2019-11-05

申请号：US15405908

申请日：2017-01-13

Applicant: Huawei Technologies Co., Ltd.

Inventor： Feng Li ,  Fan Fang

IPC: G06F13/24 ,  G06F13/42

Abstract: A method and a device for sharing a PCIe I/O device, and an interconnection system are provided. The method includes: determining a shared PCIe I/O device in a PCIe interconnection system; establishing, by using a BAR at a working node, a first mapping relationship between an address of a CSR of the shared PCIe I/O device and an address, used for processing the CSR, in a working node domain. The method also includes establishing, by using an A-LUT fragment at a management node side of the NTB, a second mapping relationship between an address, used for receiving an MSI-X interrupt of the shared PCIe I/O device, in a management node domain and an address, used for processing the MSI-X interrupt, in the working node domain.

公开(公告)号：US09774651B2

公开(公告)日：2017-09-26

申请号：US14251712

申请日：2014-04-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Fan Fang ,  Keping Chen

IPC: G06F15/16 ,  H04L29/08 ,  G06F9/38 ,  H04L29/06 ,  G06F13/28 ,  G06F13/38

CPC classification number: H04L67/02 ,  G06F9/3824 ,  G06F13/28 ,  G06F13/385 ,  G06F2213/3808 ,  H04L65/4084 ,  H04L65/80

Abstract: A method and an apparatus for rapid data distribution, the method includes: sending, by a central processing unit, data description information to a rapid forwarding module, where the data description information includes an address and length information of data requested by a user; reading, by the rapid forwarding module according to the data description information, the data requested by the user and forwarding the data requested by the user to a network interface controller; and sending, by the network interface controller, the data requested by the user to the user. By using the method provided in the present invention, after services are increased, only the network interface controller and a storage device need to be added, and cost for the memory and the central processing unit does not need to be increased.

公开(公告)号：US20170124018A1

公开(公告)日：2017-05-04

申请号：US15405908

申请日：2017-01-13

Applicant: Huawei Technologies Co., Ltd.

Inventor： Feng Li ,  Fan Fang

IPC: G06F13/42 ,  G06F13/24

CPC classification number: G06F13/4282 ,  G06F13/24 ,  G06F2213/0026

Abstract: A method and a device for sharing a PCIe I/O device, and an interconnection system are provided. The method includes: determining a shared PCIe I/O device in a PCIe interconnection system; establishing, by using a BAR at a working node, a first mapping relationship between an address of a CSR of the shared PCIe I/O device and an address, used for processing the CSR, in a working node domain. The method also includes establishing, by using an A-LUT fragment at a management node side of the NTB, a second mapping relationship between an address, used for receiving an MSI-X interrupt of the shared PCIe I/O device, in a management node domain and an address, used for processing the MSI-X interrupt, in the working node domain.

公开(公告)号：US08478926B1

公开(公告)日：2013-07-02

申请号：US13622422

申请日：2012-09-19

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xiaofeng Zhang ,  Fan Fang ,  Ling Qin

IPC: G06F13/36

CPC classification number: G06F15/167 ,  G06F9/3881 ,  G06F9/505 ,  G06F9/544

Abstract: An embodiment of the present invention discloses a co-processing acceleration method, including: receiving a co-processing request message which is sent by a compute node in a computer system and carries address information of to-be-processed data; according to the co-processing request message, obtaining the to-be-processed data, and storing the to-be-processed data in a public buffer card; and allocating the to-be-processed data stored in the public buffer card to an idle co-processor card in the computer system for processing. An added public buffer card is used as a public data buffer channel between a hard disk and each co-processor card of a computer system, and to-be-processed data does not need to be transferred by a memory of the compute node, which avoids overheads of the data in transmission through the memory of the compute node, and thereby breaks through a bottleneck of memory delay and bandwidth, and increases a co-processing speed.

Abstract translation: 本发明的实施例公开了一种协处理加速方法，包括：接收由计算机系统中的计算节点发送的协处理请求消息，并携带待处理数据的地址信息; 根据协同处理请求消息，获得待处理数据，并将待处理数据存储在公共缓冲卡中; 以及将存储在公共缓冲卡中的待处理数据分配给计算机系统中的空闲协处理器卡进行处理。 添加的公共缓冲卡被用作计算机系统的硬盘和每个协处理器卡之间的公共数据缓冲通道，并且待处理数据不需要由计算节点的存储器传送， 避免通过计算节点的存储器传输的数据的开销，从而突破存储器延迟和带宽的瓶颈，并增加协处理速度。

公开(公告)号：US20140222960A1

公开(公告)日：2014-08-07

申请号：US14251712

申请日：2014-04-14

Applicant: Huawei Technologies Co., Ltd.

Inventor： Fan Fang ,  Keping Chen

IPC: H04L29/08

CPC classification number: H04L67/02 ,  G06F9/3824 ,  G06F13/28 ,  G06F13/385 ,  G06F2213/3808 ,  H04L65/4084 ,  H04L65/80

Abstract: A method and an apparatus for rapid data distribution, the method includes: sending, by a central processing unit, data description information to a rapid forwarding module, where the data description information includes an address and length information of data requested by a user; reading, by the rapid forwarding module according to the data description information, the data requested by the user and forwarding the data requested by the user to a network interface controller; and sending, by the network interface controller, the data requested by the user to the user. By using the method provided in the present invention, after services are increased, only the network interface controller and a storage device need to be added, and cost for the memory and the central processing unit does not need to be increased.

Abstract translation: 一种用于快速数据分发的方法和装置，该方法包括：由中央处理单元向快速转发模块发送数据描述信息，其中数据描述信息包括用户请求的数据的地址和长度信息; 由快速转发模块根据数据描述信息读取用户请求的数据，并将用户请求的数据转发给网络接口控制器; 并由网络接口​​控制器发送用户请求的数据给用户。 通过使用本发明提供的方法，在增加服务之后，仅需要添加网络接口控制器和存储设备，并且不需要增加存储器和中央处理单元的成本。

公开(公告)号：US20130238871A1

公开(公告)日：2013-09-12

申请号：US13871596

申请日：2013-04-26

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fan Fang ,  Baifeng Yu

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F13/1668 ,  G06F2213/0026

Abstract: A data processing method and apparatus, a PCI-E bus system, and a server are provided. The method includes: configuring address information of a PCI-E memory of a PCI-E device, so that the PCI-E device stores data received by the PCI-E device in the PCI-E memory; and controlling a CPU to access the data stored in the PCI-E memory, so that the CPU processes the data. thus a problem that in the prior art, because the PCI-E device stores the data received by the PCI-E device in a memory of the CPU, when the data stored in the memory of the CPU is accessed by another CPU, a part of a bandwidth of a bus between the another CPU and the CPU is occupied and a bus through which the CPU accesses the memory that corresponds the CPU is occupied can be avoided, thereby improving a utilization rate of the CPU.

Abstract translation: 提供数据处理方法和装置，PCI-E总线系统和服务器。 该方法包括：配置PCI-E设备的PCI-E存储器的地址信息，使得PCI-E设备将PCI-E设备接收的数据存储在PCI-E存储器中; 并控制CPU访问存储在PCI-E存储器中的数据，以便CPU处理数据。 因此在现有技术中，由于PCI-E设备将由PCI-E设备接收到的数据存储在CPU的存储器中，所以当存储在CPU的存储器中的数据被另一个CPU访问时， 占用另一CPU和CPU之间的总线带宽，并且可以避免CPU访问对应于CPU的存储器的总线，从而提高CPU的利用率。