公开(公告)号：US11750198B2

公开(公告)日：2023-09-05

申请号：US17564595

申请日：2021-12-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yanqin Chen ,  Chunbiao Wu ,  Yongwang Liu ,  Bingzhao Zhang

IPC: H03L7/02

CPC classification number: H03L7/02

Abstract: Embodiments of this application disclose an RC oscillator that amplifies a difference between a first voltage and a second voltage by using a first amplifier and a second amplifier. The first amplifier may include a first amplification circuit and a second amplification circuit. The first amplification circuit and the second amplification circuit may share a same voltage-current conversion circuit. The RC oscillator disclosed in the embodiments of this application not only avoids noise introduced by the first amplifier, but also reduces internal noise of the RC oscillator and a jitter of a clock signal.

公开(公告)号：US20240104048A1

公开(公告)日：2024-03-28

申请号：US18526047

申请日：2023-12-01

Applicant: Huawei Technologies Co., Ltd.

Inventor： Bingzhao Zhang ,  Yanqin Chen ,  Zhaohua Qian ,  Hangzhou Chen ,  Jiandong Ke ,  Guizhen Wang ,  Lijuan Tan

IPC: G06F13/42

CPC classification number: G06F13/4282 ,  G06F2213/0012

Abstract: A transmitting apparatus includes a signal generation circuit and an adjustment circuit. The signal generation circuit is configured to send, to a receiving apparatus, a serial data signal that carries a training sequence and valid data, where the training sequence is used to train a skew or an equalization of the serial data signal, and the valid data is used to detect an amplitude of the serial data signal. The adjustment circuit is configured to receive indication information from the receiving apparatus, and adjust a transmission parameter of the serial data signal based on the indication information, where the transmission parameter includes at least one of the skew, the equalization, or the amplitude.

公开(公告)号：US20240007106A1

公开(公告)日：2024-01-04

申请号：US18468475

申请日：2023-09-15

Applicant: Huawei Technologies Co., Ltd.

Inventor： Zhaohua Qian ,  Jingjing Wang ,  Yanqin Chen ,  Jiandong Ke

IPC: H03K17/687

CPC classification number: H03K17/6872

Abstract: An interface circuit, a method for controlling the interface circuit, a chip, and a terminal device are provided. The interface circuit includes a first PMOS transistor, an input signal control circuit, a bias circuit, a signal input end, and an input/output end. The bias circuit includes a substrate bias voltage generation end and a bias voltage generation end. The bias circuit is coupled to a high-level power supply end, the input/output end, and a ground end. The input signal control circuit is connected to the signal input end, the bias voltage generation end, and a gate of the first PMOS transistor; a first electrode of the first PMOS transistor is connected to the high-level power supply end, and a second electrode of the first PMOS transistor is connected to the input/output end.

公开(公告)号：US11742863B2

公开(公告)日：2023-08-29

申请号：US17901971

申请日：2022-09-02

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Yanqin Chen

IPC: H03L7/089 ,  H03L7/099

CPC classification number: H03L7/0891 ,  H03L7/0995

Abstract: The technology of this application relates to a phase-locked loop circuit that includes a phase frequency detector, a first voltage control module, a second voltage control module, a third voltage control module, a voltage-controlled oscillator, and a frequency divider. A first output end of the phase frequency detector is connected to a first input end of the first voltage control module and a first input end of the second voltage control module, a second output end of the phase frequency detector is connected to a second input end of the first voltage control module and a second input end of the second voltage control module, an output end of the first voltage control module.