Abstract:
An operational amplifier, a drive circuit, an interface chip (1201, 1301, 1401, 1501), and an electronic device (1600) relate to the field of power electronics technologies. The operational amplifier includes a first load (R1), a second load (R2), a first switching transistor group (301-1), a second switching transistor group (301-2), and a tail current source (203). The first switching transistor group (301-1) has a first end connected to a first output end (outp) of the operational amplifier and connected to a power supply (VDD) of the operational amplifier by using the first load (R1), and has a second end grounded by using the tail current source (203). The second switching transistor group (301-2) has a first end connected to a second output end (outn) of the operational amplifier.
Abstract:
Embodiments of this application disclose an RC oscillator that amplifies a difference between a first voltage and a second voltage by using a first amplifier and a second amplifier. The first amplifier may include a first amplification circuit and a second amplification circuit. The first amplification circuit and the second amplification circuit may share a same voltage-current conversion circuit. The RC oscillator disclosed in the embodiments of this application not only avoids noise introduced by the first amplifier, but also reduces internal noise of the RC oscillator and a jitter of a clock signal.
Abstract:
A transmitting apparatus includes a signal generation circuit and an adjustment circuit. The signal generation circuit is configured to send, to a receiving apparatus, a serial data signal that carries a training sequence and valid data, where the training sequence is used to train a skew or an equalization of the serial data signal, and the valid data is used to detect an amplitude of the serial data signal. The adjustment circuit is configured to receive indication information from the receiving apparatus, and adjust a transmission parameter of the serial data signal based on the indication information, where the transmission parameter includes at least one of the skew, the equalization, or the amplitude.
Abstract:
A phase-locked loop circuit, which includes a phase frequency detector, a charge pump, a loop low-pass filter, a first voltage-current converter, a second voltage-current converter, a current-controlled oscillator, a frequency divider, a comparator, and a mode controller, where the mode controller is configured to control the switches S1, S2, and S3 included in the loop low-pass filter to connect or disconnect. Using the phase-locked loop circuit, a voltage value of a second control voltage signal VC2 provided for the first voltage-current converter can reach, in a relatively short time, a voltage value of a first control voltage signal VC1 provided for the second voltage-current converter, thereby increasing a speed of establishing the phase-locked loop circuit and implementing a quick response of the phase-locked loop circuit.
Abstract:
A phase-locked loop circuit, which includes a phase frequency detector, a charge pump, a loop low-pass filter, a first voltage-current converter, a second voltage-current converter, a current-controlled oscillator, a frequency divider, a comparator, and a mode controller, where the mode controller is configured to control the switches S1, S2, and S3 included in the loop low-pass filter to connect or disconnect. Using the phase-locked loop circuit, a voltage value of a second control voltage signal VC2 provided for the first voltage-current converter can reach, in a relatively short time, a voltage value of a first control voltage signal VC1 provided for the second voltage-current converter, thereby increasing a speed of establishing the phase-locked loop circuit and implementing a quick response of the phase-locked loop circuit.