公开(公告)号：US11855616B2

公开(公告)日：2023-12-26

申请号：US17887176

申请日：2022-08-12

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Pengfei Zhao ,  Lijuan Tan

IPC: H03K17/56

CPC classification number: H03K17/56

Abstract: An integrated circuit, a control method, and a system are provided, to improve reliability of the integrated circuit. The integrated circuit mainly includes a power supply pin, a configuration pin, a switchable pull-up resistor, and a control unit. The integrated circuit can provide a control signal for a target chip using the configuration pin of the integrated circuit. In the integrated circuit, a first end of the switchable pull-up resistor is connected to the power supply pin, a second end of the switchable pull-up resistor is connected to the configuration pin, and a control end of the switchable pull-up resistor is connected to the control unit. The power supply pin can receive a power supply voltage of the integrated circuit.

公开(公告)号：US10536730B2

公开(公告)日：2020-01-14

申请号：US15640658

申请日：2017-07-03

Applicant: Huawei Technologies Co., Ltd.

Inventor： Lijuan Tan

IPC: H04N21/2343 ,  H04N21/4402 ,  H04N7/01

Abstract: A method for processing video frames, a video processing chip, and a Motion Estimation/Motion Compensation (MEMC) chip are provided. The method performed by the video processing chip includes obtaining multiple video frames and adjusting each video frame from a first resolution to a second resolution. The method also includes inserting at least one invalid frame into the multiple video frames according to a second frame rate, so that a frame rate of a transport frame stream is the second frame rate; and sending the transport frame stream to an MEMC chip. The video processing chip and the MEMC chip may perform transmission of a frame stream according to an interface frequency corresponding to a resolution and a frame rate that are agreed upon.

公开(公告)号：US20170302973A1

公开(公告)日：2017-10-19

申请号：US15640658

申请日：2017-07-03

Applicant: Huawei Technologies Co., Ltd.

Inventor： Lijuan Tan

IPC: H04N21/2343 ,  H04N7/01 ,  H04N21/4402

CPC classification number: H04N21/2343 ,  G06F3/14 ,  G09G5/003 ,  G09G5/005 ,  G09G5/393 ,  G09G2320/106 ,  G09G2340/04 ,  G09G2340/0435 ,  H04N7/0117 ,  H04N7/0135 ,  H04N21/42607 ,  H04N21/43635 ,  H04N21/4402 ,  H04N21/440263 ,  H04N21/440281

Abstract: A method for processing video frames, a video processing chip, and a Motion Estimation/Motion Compensation (MEMC) chip are provided. The method performed by the video processing chip includes obtaining multiple video frames and adjusting each video frame from a first resolution to a second resolution. The method also includes inserting at least one invalid frame into the multiple video frames according to a second frame rate, so that a frame rate of a transport frame stream is the second frame rate; and sending the transport frame stream to an MEMC chip. The video processing chip and the MEMC chip may perform transmission of a frame stream according to an interface frequency corresponding to a resolution and a frame rate that are agreed upon.

公开(公告)号：US20160179187A1

公开(公告)日：2016-06-23

申请号：US15056379

申请日：2016-02-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Lijuan Tan

IPC: G06F1/32 ,  G06F13/362 ,  G06F1/26

CPC classification number: G06F1/3296 ,  G06F1/266 ,  G06F1/28 ,  G06F13/362 ,  G06F13/4072

Abstract: An input/output (I/O) interface-based signal output method and apparatus. The method includes determining whether a voltage output by a core power supply domain of a first chip is lower than a preset threshold voltage of the first chip, and when the voltage output by the core power supply domain is lower than the threshold voltage, generating a first level signal according to a control function of the first chip over a second chip, where the first level signal is used to enable the second chip to be in an ignoring state after the second chip receives the first level signal, and sending the first level signal to the second chip through an I/O interface, where the ignoring state indicates that the second chip ignores a control signal and a data signal that are sent by the first chip where the method improves stable performance of a chip product.

Abstract translation: 一种基于输入/输出（I / O）接口的信号输出方法和装置。 该方法包括：确定由第一芯片的核心电源域输出的电压是否低于第一芯片的预设阈值电压，并且当由核心电源域输出的电压低于阈值电压时，产生 根据第一芯片在第二芯片上的控制功能的第一电平信号，其中第一电平信号用于在第二芯片接收到第一电平信号之后使第二芯片处于忽略状态，并且发送第一电平 通过I / O接口向第二芯片发送信号，其中忽略状态指示第二芯片忽略由第一芯片发送的控制信号和数据信号，该方法提高了芯片产品的稳定性能。

公开(公告)号：US20240104048A1

公开(公告)日：2024-03-28

申请号：US18526047

申请日：2023-12-01

Applicant: Huawei Technologies Co., Ltd.

Inventor： Bingzhao Zhang ,  Yanqin Chen ,  Zhaohua Qian ,  Hangzhou Chen ,  Jiandong Ke ,  Guizhen Wang ,  Lijuan Tan

IPC: G06F13/42

CPC classification number: G06F13/4282 ,  G06F2213/0012

Abstract: A transmitting apparatus includes a signal generation circuit and an adjustment circuit. The signal generation circuit is configured to send, to a receiving apparatus, a serial data signal that carries a training sequence and valid data, where the training sequence is used to train a skew or an equalization of the serial data signal, and the valid data is used to detect an amplitude of the serial data signal. The adjustment circuit is configured to receive indication information from the receiving apparatus, and adjust a transmission parameter of the serial data signal based on the indication information, where the transmission parameter includes at least one of the skew, the equalization, or the amplitude.

公开(公告)号：US10558258B2

公开(公告)日：2020-02-11

申请号：US15056379

申请日：2016-02-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Lijuan Tan

IPC: G06F1/26 ,  G06F1/32 ,  G06F13/36 ,  G06F1/3296 ,  G06F13/362

Abstract: An input/output (I/O) interface-based signal output method and apparatus. The method includes determining whether a voltage output by a core power supply domain of a first chip is lower than a preset threshold voltage of the first chip, and when the voltage output by the core power supply domain is lower than the threshold voltage, generating a first level signal according to a control function of the first chip over a second chip, where the first level signal is used to enable the second chip to be in an ignoring state after the second chip receives the first level signal, and sending the first level signal to the second chip through an I/O interface, where the ignoring state indicates that the second chip ignores a control signal and a data signal that are sent by the first chip where the method improves stable performance of a chip product.

公开(公告)号：US09742548B2

公开(公告)日：2017-08-22

申请号：US14709052

申请日：2015-05-11

Applicant: Huawei Technologies Co., Ltd.

Inventor： Lijuan Tan

IPC: H04L5/22 ,  H04L12/935 ,  G06F13/26 ,  G06F13/42

CPC classification number: H04L5/22 ,  G06F13/26 ,  G06F13/4282 ,  H04L49/30

Abstract: A method and an apparatus for using a serial port device in a time division multiplexing manner are provided. The apparatus includes a first serial port, a second serial port, a switching circuit, and a signal interface, where the switching circuit selects to receive data sent; the first serial port sends first data to a first serial port device; the second serial port receives second data sent by a second serial port device, and when it is determined that the second data indicates that the second serial port device needs to receive third data sent by the second serial port, instructs the switching circuit to select to receive the third data sent; and the second serial port sends the third data to the second serial port device. Therefore, the first serial port and the second serial port can use corresponding serial port devices in a time division multiplexing manner.