公开(公告)号：US07245012B2

公开(公告)日：2007-07-17

申请号：US10878084

申请日：2004-06-28

申请人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

发明人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49816 ,  H01L27/124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014

摘要： A thin film transistor (TFT) substrate includes a glass substrate, a thin film transistor, an electrode pad, and a conductive bump. The TFT and the electrode pad are formed on the glass substrate, and the electrode pad is used for electrically connecting with the thin film transistor. The conductive bump includes several insulating bumps and a conductive layer. The insulating bumps are formed on the electrode pad dividedly, and the conductive layer covers the top surfaces of the insulating bumps, the inward surfaces of the insulating bumps, and the electrode pad between the insulating bumps for electrically connecting with the electrode pad. The outward side surfaces of the insulating bumps are exposed out of the conductive layer.

摘要翻译： 薄膜晶体管（TFT）基板包括玻璃基板，薄膜晶体管，电极焊盘和导电凸块。 TFT和电极焊盘形成在玻璃基板上，并且电极焊盘用于与薄膜晶体管电连接。 导电凸块包括数个绝缘凸块和导电层。 绝缘凸块分别形成在电极焊盘上，并且导电层覆盖绝缘凸块的顶表面，绝缘凸块的内表面以及用于与电极焊盘电连接的绝缘凸块之间的电极焊盘。 绝缘凸块的外侧表面露出导电层。

公开(公告)号：US20050184389A1

公开(公告)日：2005-08-25

申请号：US10878084

申请日：2004-06-28

申请人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

发明人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

IPC分类号： H01L21/00 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L29/786

CPC分类号： H01L23/49816 ,  H01L27/124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014

摘要： A thin film transistor (TFT) substrate includes a glass substrate, a thin film transistor, an electrode pad, and a conductive bump. The TFT and the electrode pad are formed on the glass substrate, and the electrode pad is used for electrically connecting with the thin film transistor. The conductive bump includes several insulating bumps and a conductive layer. The insulating bumps are formed on the electrode pad dividedly, and the conductive layer covers the top surfaces of the insulating bumps, the inward surfaces of the insulating bumps, and the electrode pad between the insulating bumps for electrically connecting with the electrode pad. The outward side surfaces of the insulating bumps are exposed out of the conductive layer.

摘要翻译： 薄膜晶体管（TFT）基板包括玻璃基板，薄膜晶体管，电极焊盘和导电凸块。 TFT和电极焊盘形成在玻璃基板上，并且电极焊盘用于与薄膜晶体管电连接。 导电凸块包括数个绝缘凸块和导电层。 绝缘凸块分别形成在电极焊盘上，并且导电层覆盖绝缘凸块的顶表面，绝缘凸块的内表面以及用于与电极焊盘电连接的绝缘凸块之间的电极焊盘。 绝缘凸块的外侧表面露出导电层。

公开(公告)号：US07390734B2

公开(公告)日：2008-06-24

申请号：US11757454

申请日：2007-06-04

申请人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

发明人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

IPC分类号： H01L21/44

CPC分类号： H01L23/49816 ,  H01L27/124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014

摘要： A thin film transistor (TFT) substrate includes a glass substrate, a thin film transistor, an electrode pad, and a conductive bump. The TFT and the electrode pad are formed on the glass substrate, and the electrode pad is used for electrically connecting with the thin film transistor. The conductive bump includes several insulating bumps and a conductive layer. The insulating bumps are formed on the electrode pad dividedly, and the conductive layer covers the top surfaces of the insulating bumps, the inward surfaces of the insulating bumps, and the electrode pad between the insulating bumps for electrically connecting with the electrode pad. The outward side surfaces of the insulating bumps are exposed out of the conductive layer.

摘要翻译： 薄膜晶体管（TFT）基板包括玻璃基板，薄膜晶体管，电极焊盘和导电凸块。 TFT和电极焊盘形成在玻璃基板上，并且电极焊盘用于与薄膜晶体管电连接。 导电凸块包括数个绝缘凸块和导电层。 绝缘凸块分别形成在电极焊盘上，并且导电层覆盖绝缘凸块的顶表面，绝缘凸块的内表面以及用于与电极焊盘电连接的绝缘凸块之间的电极焊盘。 绝缘凸块的外侧表面露出导电层。

公开(公告)号：US20070231982A1

公开(公告)日：2007-10-04

申请号：US11757454

申请日：2007-06-04

申请人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

发明人： Hui-Chang Chen ,  Chun-Yu Lee ,  Shih-Ping Chou

IPC分类号： H01L21/764 ,  H01L21/84

CPC分类号： H01L23/49816 ,  H01L27/124 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014

摘要： A thin film transistor (TFT) substrate includes a glass substrate, a thin film transistor, an electrode pad, and a conductive bump. The TFT and the electrode pad are formed on the glass substrate, and the electrode pad is used for electrically connecting with the thin film transistor. The conductive bump includes several insulating bumps and a conductive layer. The insulating bumps are formed on the electrode pad dividedly, and the conductive layer covers the top surfaces of the insulating bumps, the inward surfaces of the insulating bumps, and the electrode pad between the insulating bumps for electrically connecting with the electrode pad. The outward side surfaces of the insulating bumps are exposed out of the conductive layer.

摘要翻译： 薄膜晶体管（TFT）基板包括玻璃基板，薄膜晶体管，电极焊盘和导电凸块。 TFT和电极焊盘形成在玻璃基板上，并且电极焊盘用于与薄膜晶体管电连接。 导电凸块包括数个绝缘凸块和导电层。 绝缘凸块分别形成在电极焊盘上，并且导电层覆盖绝缘凸块的顶表面，绝缘凸块的内表面和用于与电极焊盘电连接的绝缘凸块之间的电极焊盘。 绝缘凸块的外侧表面露出导电层。

公开(公告)号：US07507592B2

公开(公告)日：2009-03-24

申请号：US11688954

申请日：2007-03-21

申请人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

发明人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

IPC分类号： H01L21/60

CPC分类号： G02F1/13452 ,  H05K1/113 ,  H05K3/225 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09436 ,  H05K2201/09509

摘要： A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.

摘要翻译： 一种显示装置的焊盘结构。 第一导电层形成在衬底上，覆盖衬底和第一导电层形成保护层，并且形成覆盖保护层的第二导电层。 开口结构穿透第二导电层和保护层以暴露第一导电层。 形成第三导电层，覆盖第二导电层以接触开口结构的侧壁和底部。 因此，第三导电层电连接到第二导电层以提供第一电连接路径，并且第三导电层电连接到第一导电层以提供第二电连接路径。

公开(公告)号：US07211738B2

公开(公告)日：2007-05-01

申请号：US10891921

申请日：2004-07-15

申请人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

发明人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

IPC分类号： H01R12/04

CPC分类号： G02F1/13452 ,  H05K1/113 ,  H05K3/225 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09436 ,  H05K2201/09509

摘要： A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.

摘要翻译： 一种显示装置的焊盘结构。 第一导电层形成在衬底上，覆盖衬底和第一导电层形成保护层，并且形成覆盖保护层的第二导电层。 开口结构穿透第二导电层和保护层以暴露第一导电层。 形成第三导电层，覆盖第二导电层以接触开口结构的侧壁和底部。 因此，第三导电层电连接到第二导电层以提供第一电连接路径，并且第三导电层电连接到第一导电层以提供第二电连接路径。

公开(公告)号：US07576992B2

公开(公告)日：2009-08-18

申请号：US11424273

申请日：2006-06-15

申请人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

发明人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

IPC分类号： H05K1/00

CPC分类号： H05K3/361 ,  G02F1/13452 ,  H05K3/323 ,  H05K3/381 ,  H05K2201/09781

摘要： A flexible printed circuit comprising a substrate, a plurality of function lines, and a plurality of first dummy lines. The substrate comprises at least two periphery areas and an intermediate area. Each periphery area comprises a first layout region, a second layout region and a first rough region disposed between the first and second layout regions. The intermediate area is disposed between the periphery areas. The function lines are disposed on the substrate and within the intermediate area. The first dummy lines are disposed on the substrate and within the first or second layout area.

摘要翻译： 一种柔性印刷电路，包括基板，多个功能线和多个第一虚线。 衬底包括至少两个周边区域和中间区域。 每个周边区域包括第一布局区域，第二布局区域和布置在第一和第二布局区域之间的第一粗糙区域。 中间区域设置在周边区域之间。 功能线设置在基板上并在中间区域内。 第一虚线设置在基板上并且在第一或第二布局区域内。

公开(公告)号：US20070144771A1

公开(公告)日：2007-06-28

申请号：US11424273

申请日：2006-06-15

申请人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

发明人： Chien-Liang Chen ,  Chun-Yu Lee ,  Hui-Chang Chen

IPC分类号： H05K1/00

CPC分类号： H05K3/361 ,  G02F1/13452 ,  H05K3/323 ,  H05K3/381 ,  H05K2201/09781

摘要： A flexible printed circuit comprising a substrate, a plurality of function lines, and a plurality of first dummy lines. The substrate comprises at least two periphery areas and an intermediate area. Each periphery area comprises a first layout region, a second layout region and a first rough region disposed between the first and second layout regions. The intermediate area is disposed between the periphery areas. The function lines are disposed on the substrate and within the intermediate area. The first dummy lines are disposed on the substrate and within the first or second layout area.

摘要翻译： 一种柔性印刷电路，包括基板，多个功能线和多个第一虚线。 衬底包括至少两个周边区域和中间区域。 每个周边区域包括第一布局区域，第二布局区域和布置在第一和第二布局区域之间的第一粗糙区域。 中间区域设置在周边区域之间。 功能线设置在基板上并在中间区域内。 第一虚线设置在基板上并且在第一或第二布局区域内。

公开(公告)号：US20050072597A1

公开(公告)日：2005-04-07

申请号：US10891921

申请日：2004-07-15

申请人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

发明人： Chun-Yu Lee ,  Shy-Ping Chou ,  Hui-Chang Chen

IPC分类号： G02F1/13 ,  H05K1/11 ,  H05K3/22 ,  H05K3/32 ,  H05K3/36

CPC分类号： G02F1/13452 ,  H05K1/113 ,  H05K3/225 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09436 ,  H05K2201/09509

摘要： A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.

摘要翻译： 一种显示装置的焊盘结构。 第一导电层形成在衬底上，覆盖衬底和第一导电层形成保护层，并且形成覆盖保护层的第二导电层。 开口结构穿透第二导电层和保护层以暴露第一导电层。 形成第三导电层，覆盖第二导电层以接触开口结构的侧壁和底部。 因此，第三导电层电连接到第二导电层以提供第一电连接路径，并且第三导电层电连接到第一导电层以提供第二电连接路径。

公开(公告)号：US07030622B2

公开(公告)日：2006-04-18

申请号：US11049158

申请日：2005-02-02

申请人： Hui-Chang Chen ,  Chun-Yu Lee

发明人： Hui-Chang Chen ,  Chun-Yu Lee

IPC分类号： G01R31/02 ,  B23K1/19

CPC分类号： G01R1/07378

摘要： A bonding configuration structure for facilitating electrical testing in a bonding process and a testing method are provided. The bonding configuration includes a bonded component, a bonding component, a bond portion and a leading component. The bonding component is disposed on the bonded component. The bonding component has a first end and a second end. The first end is coupled to the bond portion. The second end is disposed on the bonded component to form the first testing portion.

摘要翻译： 提供了一种用于在接合过程和测试方法中促进电测试的接合构造结构。 接合构造包括接合部件，接合部件，接合部和引导部件。 接合部件设置在接合部件上。 接合部件具有第一端和第二端。 第一端耦合到接合部分。 第二端设置在接合部件上以形成第一测试部分。